From: Dave Hansen First, it's nice to remove the magic numbers. Second, KERNEL_PAGE_TABLE_ISOLATION is going to consume half of the available ASID space. The space is currently unused, but add a comment to spell out this new restriction. Signed-off-by: Dave Hansen Signed-off-by: Ingo Molnar Signed-off-by: Thomas Gleixner Cc: Rik van Riel Cc: keescook@google.com Cc: Denys Vlasenko Cc: moritz.lipp@iaik.tugraz.at Cc: linux-mm@kvack.org Cc: Peter Zijlstra Cc: Brian Gerst Cc: hughd@google.com Cc: daniel.gruss@iaik.tugraz.at Cc: Borislav Petkov Cc: Andy Lutomirski Cc: Josh Poimboeuf Cc: michael.schwarz@iaik.tugraz.at Cc: Linus Torvalds Cc: richard.fellner@student.tugraz.at Link: https://lkml.kernel.org/r/20171123003504.57EDB845@viggo.jf.intel.com --- arch/x86/include/asm/tlbflush.h | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -75,6 +75,22 @@ static inline u64 inc_mm_tlb_gen(struct return new_tlb_gen; } +/* There are 12 bits of space for ASIDS in CR3 */ +#define CR3_HW_ASID_BITS 12 +/* + * When enabled, KERNEL_PAGE_TABLE_ISOLATION consumes a single bit for + * user/kernel switches + */ +#define KPTI_CONSUMED_ASID_BITS 0 + +#define CR3_AVAIL_ASID_BITS (CR3_HW_ASID_BITS - KPTI_CONSUMED_ASID_BITS) +/* + * ASIDs are zero-based: 0->MAX_AVAIL_ASID are valid. -1 below to account + * for them being zero-based. Another -1 is because ASID 0 is reserved for + * use by non-PCID-aware users. + */ +#define MAX_ASID_AVAILABLE ((1 << CR3_AVAIL_ASID_BITS) - 2) + /* * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID bits. * This serves two purposes. It prevents a nasty situation in which @@ -87,7 +103,7 @@ struct pgd_t; static inline unsigned long build_cr3(pgd_t *pgd, u16 asid) { if (static_cpu_has(X86_FEATURE_PCID)) { - VM_WARN_ON_ONCE(asid > 4094); + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); return __sme_pa(pgd) | (asid + 1); } else { VM_WARN_ON_ONCE(asid != 0); @@ -97,7 +113,7 @@ static inline unsigned long build_cr3(pg static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) { - VM_WARN_ON_ONCE(asid > 4094); + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); return __sme_pa(pgd) | (asid + 1) | CR3_NOFLUSH; }