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Message-ID: <7htvx3r4o7.fsf@baylibre.com>
Date: Wed, 06 Dec 2017 12:18:32 -0800
From: Kevin Hilman <khilman@...libre.com>
To: Yixun Lan <yixun.lan@...ogic.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Linus Walleij <linus.walleij@...aro.org>,
Neil Armstrong <narmstrong@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Carlo Caione <carlo@...one.org>,
Xingyu Chen <xingyu.chen@...ogic.com>,
<devicetree@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
<linux-amlogic@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [RESEND PATCH v3 2/2] ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC
Yixun Lan <yixun.lan@...ogic.com> writes:
> From: Xingyu Chen <xingyu.chen@...ogic.com>
>
> Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.
>
> Reviewed-by: Neil Armstrong <narmstrong@...libre.com>
> Signed-off-by: Xingyu Chen <xingyu.chen@...ogic.com>
> Signed-off-by: Yixun Lan <yixun.lan@...ogic.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 44 ++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index 5fc33b76b91c..e0fb860e12c5 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -9,6 +9,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/axg-clkc.h>
> #include <dt-bindings/clock/axg-aoclkc.h>
This doesn't apply because this aoclkc.h header does not exist in
mainline.
Kevin
> +#include <dt-bindings/gpio/meson-axg-gpio.h>
>
> / {
> compatible = "amlogic,meson-axg";
> @@ -173,6 +174,32 @@
> #mbox-cells = <1>;
> };
>
> + periphs: periphs@...34000 {
> + compatible = "simple-bus";
> + reg = <0x0 0xff634000 0x0 0x2000>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
> +
> + pinctrl_periphs: pinctrl@480 {
> + compatible = "amlogic,meson-axg-periphs-pinctrl";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gpio: bank@480 {
> + reg = <0x0 0x00480 0x0 0x40>,
> + <0x0 0x004e8 0x0 0x14>,
> + <0x0 0x00520 0x0 0x14>,
> + <0x0 0x00430 0x0 0x3c>;
> + reg-names = "mux", "pull", "pull-enable", "gpio";
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&pinctrl_periphs 0 0 86>;
> + };
> + };
> + };
> +
> sram: sram@...c0000 {
> compatible = "amlogic,meson-axg-sram", "mmio-sram";
> reg = <0x0 0xfffc0000 0x0 0x20000>;
> @@ -209,6 +236,23 @@
> };
> };
>
> + pinctrl_aobus: pinctrl@14 {
> + compatible = "amlogic,meson-axg-aobus-pinctrl";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gpio_ao: bank@14 {
> + reg = <0x0 0x00014 0x0 0x8>,
> + <0x0 0x0002c 0x0 0x4>,
> + <0x0 0x00024 0x0 0x8>;
> + reg-names = "mux", "pull", "gpio";
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&pinctrl_aobus 0 0 15>;
> + };
> + };
> +
> uart_AO: serial@...0 {
> compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
> reg = <0x0 0x3000 0x0 0x18>;
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