linux-kernel - RE: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU logicoreIP init driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 6 Dec 2017 05:44:44 +0000
From:   Dhaval Rajeshbhai Shah <DSHAH@...inx.com>
To:     'Arnd Bergmann' <arnd@...db.de>
CC:     gregkh <gregkh@...uxfoundation.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Michal Simek <michal.simek@...inx.com>,
        "Hyun Kwon" <hyunk@...inx.com>
Subject: RE: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU
 logicoreIP init driver

Hi Arnd,

Replies inline.

-----Original Message-----
From: arndbergmann@...il.com [mailto:arndbergmann@...il.com] On Behalf Of Arnd Bergmann
Sent: Tuesday, December 05, 2017 5:32 AM
To: Dhaval Rajeshbhai Shah <DSHAH@...inx.com>
Cc: gregkh <gregkh@...uxfoundation.org>; Linux Kernel Mailing List <linux-kernel@...r.kernel.org>; Michal Simek <michal.simek@...inx.com>; Hyun Kwon <hyunk@...inx.com>
Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU logicoreIP init driver

On Tue, Dec 5, 2017 at 1:38 PM, Dhaval Rajeshbhai Shah <DSHAH@...inx.com> wrote:
> From: arndbergmann@...il.com [mailto:arndbergmann@...il.com] On Behalf 
> Of Arnd Bergmann
> Sent: Tuesday, December 05, 2017 4:19 AM
> To: Dhaval Rajeshbhai Shah <DSHAH@...inx.com>
> Cc: gregkh <gregkh@...uxfoundation.org>; Linux Kernel Mailing List 
> <linux-kernel@...r.kernel.org>; Michal Simek 
> <michal.simek@...inx.com>; Hyun Kwon <hyunk@...inx.com>; Dhaval 
> Rajeshbhai Shah <DSHAH@...inx.com>
> Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU 
> logicoreIP init driver
>
> On Tue, Dec 5, 2017 at 12:43 PM, Dhaval Shah <dhaval.shah@...inx.com> wrote:
>> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design 
>> created. This driver will provide the api which can be used by the 
>> encoder and decoder driver to get the configured value.
>>
>> Signed-off-by: Dhaval Shah <dshah@...inx.com>
>
> Can you explain what a "VCU" is and why there is no existing subsystem for it?
>
> [Dhaval] : This VCU means Video codec unit. Here, this driver is for the logicoreIP and not the VCU which is created to support the PS and PL isolation and to provide the clock related information. So this is not a VCU driver and but just a intermediate driver which supports logicoreIP. That's why no subsystem for this.

What are PS and PL then?
[Dhaval ] :  PS is the Processing system. PL is the Programmable logic. There are few register in the logicoreIP which provides the isolation between this two in the chip. 

> If this is the "video codec unit", I'd suggest moving it to drivers/media/platform and sending the patch to the linux-media@...r.kernel.org list instead.
> [Dhaval] : This is not the Video codec unit but the driver to provide the support the IP created for the PS and PL isolation and clock related information. That why I have placed this under the "drivers/misc/".

Is the driver useful without a codec driver then? (I assume this will be answered when you explain PS and PL). If not, just put it in the same directory as the codec.
[Dhaval ] : Yes. Driver is useful without a codec driver as well. No dependency on the Codec driver.

       Arnd