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Date:   Wed, 6 Dec 2017 13:51:14 +0100
From:   Peter Zijlstra <>
To:     Jan Dakinevich <>
        "Denis V . Lunev" <>,
        Roman Kagan <>,
        Ingo Molnar <>,
        Arnaldo Carvalho de Melo <>,
        Alexander Shishkin <>,
        Jiri Olsa <>,
        Namhyung Kim <>,
        Thomas Gleixner <>,
        "H. Peter Anvin" <>,,
        Paolo Bonzini <>,
        Radim Krčmář <>,
        Andi Kleen <>,
        Kan Liang <>,
        Stephane Eranian <>,
        Zhou Chengming <>,
        Sebastian Andrzej Siewior <>,
        Colin King <>,
        Greg Kroah-Hartman <>,
        Jin Yao <>,
Subject: Re: [PATCH RFC 1/2] perf/x86/intel: make reusable LBR initialization

On Wed, Dec 06, 2017 at 02:43:02PM +0300, Jan Dakinevich wrote:
> This patch introduces globally visible intel_pmu_lbr_fill() routine,
> which gathers information which LBR MSRs are support for specific CPU
> family/model.
> It is supposed that the routine would be used in KVM code, using guest
> CPU information as an input. By this reason, it should not have any side
> effect which could affect host system.
>  * LBR information moved to separate structure `struct x86_pmu_lbr';
>  * All family-specific tweaks on gathered information are applied only
>    for global x86_pmu.lbr to keep current perf initialization behavior.
> Signed-off-by: Jan Dakinevich <>

Hurch, that's a lot of churn. Nothing bad stood out though.

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