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Message-ID: <20171206185758.bu7z3evwmidvp3ow@pd.tnic>
Date: Wed, 6 Dec 2017 19:57:58 +0100
From: Borislav Petkov <bp@...e.de>
To: Thomas Gleixner <tglx@...utronix.de>,
Andy Lutomirsky <luto@...nel.org>
Cc: LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
Linus Torvalds <torvalds@...ux-foundation.org>,
Peter Zijlstra <peterz@...radead.org>,
Dave Hansen <dave.hansen@...el.com>,
Greg KH <gregkh@...uxfoundation.org>, keescook@...gle.com,
hughd@...gle.com, Brian Gerst <brgerst@...il.com>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Denys Vlasenko <dvlasenk@...hat.com>,
Rik van Riel <riel@...hat.com>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Juergen Gross <jgross@...e.com>,
David Laight <David.Laight@...lab.com>,
Eduardo Valentin <eduval@...zon.com>, aliguori@...zon.com,
Will Deacon <will.deacon@....com>, daniel.gruss@...k.tugraz.at
Subject: Re: [patch 38/60] x86/fixmap: Move cpu entry area into a separate PMD
On Mon, Dec 04, 2017 at 03:07:44PM +0100, Thomas Gleixner wrote:
> From: Andy Lutomirski <luto@...nel.org>
>
> This allows the cpu entry area PMDs to be shared between the kernel and
> user space page tables.
>
> [ tglx: Fixed bottom of by one and added guards so other fixmaps can be
> added later ]
>
> Signed-off-by: Andy Lutomirski <luto@...nel.org>
> Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
>
> ---
> arch/x86/include/asm/fixmap.h | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> --- a/arch/x86/include/asm/fixmap.h
> +++ b/arch/x86/include/asm/fixmap.h
> @@ -134,16 +134,22 @@ enum fixed_addresses {
> #ifdef CONFIG_PARAVIRT
> FIX_PARAVIRT_BOOTMAP,
> #endif
> - FIX_TEXT_POKE1, /* reserve 2 pages for text_poke() */
> - FIX_TEXT_POKE0, /* first page is last, because allocation is backward */
> #ifdef CONFIG_X86_INTEL_MID
> FIX_LNW_VRTC,
> #endif
> - /* Fixmap entries to remap the GDTs, one per processor. */
> + FIX_TEXT_POKE1, /* reserve 2 pages for text_poke() */
> + FIX_TEXT_POKE0, /* first page is last, because allocation is backward */
> +
> + /*
> + * Fixmap entries to remap the IDT, and the per cpu entry areas.
> + * Aligend to a PMD boundary.
"Aligned"
> + */
> + FIX_USR_SHARED_TOP = round_up(FIX_TEXT_POKE0 + 1, PTRS_PER_PMD),
> FIX_CPU_ENTRY_AREA_TOP,
> FIX_CPU_ENTRY_AREA_BOTTOM = FIX_CPU_ENTRY_AREA_TOP + (CPU_ENTRY_AREA_PAGES * NR_CPUS) - 1,
> + FIX_USR_SHARED_BOTTOM = round_up(FIX_CPU_ENTRY_AREA_BOTTOM + 2, PTRS_PER_PMD) - 1,
So those look like this here:
FIX_TEXT_POKE0: 0x285, va: 0xffffffffff57a000
FIX_USR_SHARED_TOP: 0x400, va: 0xffffffffff3ff000
FIX_CPU_ENTRY_AREA_TOP: 0x401, va: 0xffffffffff3fe000
FIX_CPU_ENTRY_AREA_BOTTOM: 0x458, va: 0xffffffffff3a7000
FIX_USR_SHARED_BOTTOM: 0x5ff, va: 0xffffffffff200000
and FIX_CPU_ENTRY_AREA_TOP is the one PTE before the last 4K. But we
could just as well use the last one too, no? I.e.,
FIX_USR_SHARED_TOP = round_up(FIX_TEXT_POKE0 + 1, PTRS_PER_PMD),
FIX_CPU_ENTRY_AREA_TOP = FIX_USR_SHARED_TOP,
?
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
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