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Date:   Thu, 7 Dec 2017 11:24:31 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Jagan Teki <jagannadh.teki@...il.com>
Cc:     Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>, Icenowy Zheng <icenowy@...c.io>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Michael Trimarchi <michael@...rulasolutions.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>,
        Jagan Teki <jagan@...rulasolutions.com>
Subject: Re: [PATCH 2/2] arm64: allwinner: a64: bananapi-m64: add usb otg

On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki <jagannadh.teki@...il.com> wrote:
> usb otg on bananapi-m64 has configured with USB-ID with PH9
> and USB-DRVVBUS attached with dcdc1 regulatort.

That is not how you read the schematic...

Intersecting lines that are tied together will have a dot representing
the connection. The DCDC1 line is a pull-up for the ID pin. This is very
clear because it has a resistor connected in series.

VBUS for OTG is controlled by the IC displayed to the right in the
schematic, which is powered from 5V, and controlled by the DRVVBUS
pin from the PMIC. Please take a look at how the A31/A33/A83T board
dts files represent this.

ChenYu

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