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Message-Id: <cover.1512771421.git.Janakarajan.Natarajan@amd.com> Date: Fri, 8 Dec 2017 16:39:11 -0600 From: Janakarajan Natarajan <Janakarajan.Natarajan@....com> To: kvm@...r.kernel.org, x86@...nel.org, linux-kernel@...r.kernel.org Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, "H . Peter Anvin" <hpa@...or.com>, Paolo Bonzini <pbonzini@...hat.com>, Radim Krcmar <rkrcmar@...hat.com>, Len Brown <len.brown@...el.com>, Kyle Huey <me@...ehuey.com>, Tom Lendacky <thomas.lendacky@....com>, Borislav Petkov <bp@...e.de>, Grzegorz Andrejczuk <grzegorz.andrejczuk@...el.com>, Kan Liang <Kan.liang@...el.com>, Janakarajan Natarajan <Janakarajan.Natarajan@....com> Subject: [PATCH v3 0/3] Support Perf Extension on AMD KVM guests This patchset adds support for Perf Extension on AMD KVM guests. When perf runs on a guest with family = 15h || 17h, the MSRs that are accessed, when the Perf Extension flag is made available, differ from the existing K7 MSRs. The accesses are to the AMD Core Performance Extension counters which provide 2 extra counters and new MSRs for both the event select and counter registers. Since the new event select and counter MSRs are interleaved and K7 MSRs are contiguous, the logic to map them to the gp_counters[] is changed. This patchset has been tested with Family 17h and Opteron G1 guests. v1->v2: * Rearranged MSR #defines based on Boris's suggestion. v2->v3: * Changed the logic of mapping MSR to gp_counters[] index based on Boris's feedback. * Removed use of family checks based on Radim's feedback. * Removed KVM bugfix patch since it is already applied. Janakarajan Natarajan (3): x86/msr: Add AMD Core Perf Extension MSRs x86/kvm: Add support for AMD Core Perf Extension in guest x86/kvm: Expose AMD Core Perf Extension flag to guests arch/x86/include/asm/msr-index.h | 14 ++++ arch/x86/kvm/cpuid.c | 8 ++- arch/x86/kvm/pmu_amd.c | 140 +++++++++++++++++++++++++++++++++++---- arch/x86/kvm/x86.c | 1 + 4 files changed, 148 insertions(+), 15 deletions(-) -- 2.7.4
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