[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20171209001816.GC7997@codeaurora.org>
Date: Fri, 8 Dec 2017 16:18:16 -0800
From: Stephen Boyd <sboyd@...eaurora.org>
To: Abhishek Sahu <absahu@...eaurora.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Rajendra Nayak <rnayak@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 12/13] clk: qcom: support for 2 bit PLL post divider
On 09/28, Abhishek Sahu wrote:
> Current PLL driver only supports 4 bit PLL post divider so
> modified the PLL divider operations to support 2 bit PLL
> post divider.
>
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Powered by blists - more mailing lists