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Message-ID: <4016321.4tnllylE8d@phil>
Date:   Sun, 10 Dec 2017 18:08:45 +0100
From:   Heiko Stuebner <heiko@...ech.de>
To:     linux-rockchip@...ts.infradead.org
Cc:     Algea Cao <algea.cao@...k-chips.com>, daniel.vetter@...el.com,
        jani.nikula@...ux.intel.com, seanpaul@...omium.org,
        airlied@...ux.ie, dri-devel@...ts.freedesktop.org,
        linux-kernel@...r.kernel.org, yang.zheng@...k-chips.com,
        kever.yang@...k-chips.com, mark.yao@...k-chips.com
Subject: Re: [PATCH v2 5/7] drm/rockchip: dw_hdmi: add hclk_vio

Hi Algea,

Am Samstag, 30. September 2017, 09:45:12 CET schrieb Algea Cao:
> Add clk hclk_vio and enable it when hdmi bind.

Could you explain what the hclk_vio reference is needed for please?

Because from from what I tracked down in the TRM and code, this hclk_vio
is defined wrong in the clock-driver.

According to the TRM, that hclk_vio (gate22[1]) is actually hclk_vio_niu and
hence the clock for the interconnect <-> hdmi  connection.
As this clock is a property of the interconnect, which we don't model so far,
all niu clocks are simply defined as critical in the clock driver itself, as can
be seen in most clock drivers.

So I'd suggest fixing the clock-driver accordingly and dropping this patch.


Heiko


> Signed-off-by: Algea Cao <algea.cao@...k-chips.com>
> ---
>  drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
> index 7658b2f..e1a9941 100644
> --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
> @@ -61,6 +61,7 @@ struct rockchip_hdmi {
>  	enum dw_hdmi_devtype dev_type;
>  	struct clk *vpll_clk;
>  	struct clk *grf_clk;
> +	struct clk *hclk_vio;
>  	struct phy *phy;
>  };
>  
> @@ -277,12 +278,27 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
>  		return PTR_ERR(hdmi->grf_clk);
>  	}
>  
> +	hdmi->hclk_vio = devm_clk_get(hdmi->dev, "hclk_vio");
> +	if (PTR_ERR(hdmi->hclk_vio) == -ENOENT) {
> +		hdmi->hclk_vio = NULL;
> +	} else if (PTR_ERR(hdmi->hclk_vio) == -EPROBE_DEFER) {
> +		return -EPROBE_DEFER;
> +	} else if (IS_ERR(hdmi->hclk_vio)) {
> +		dev_dbg(hdmi->dev, "failed to get hclk_vio clock\n");
> +		return PTR_ERR(hdmi->hclk_vio);
> +	}
>  	ret = clk_prepare_enable(hdmi->vpll_clk);
>  	if (ret) {
>  		dev_err(hdmi->dev, "Failed to enable HDMI vpll: %d\n", ret);
>  		return ret;
>  	}
>  
> +	ret = clk_prepare_enable(hdmi->hclk_vio);
> +	if (ret) {
> +		dev_dbg(hdmi->dev, "Failed to eanble HDMI hclk_vio: %d\n",
> +			ret);
> +		return ret;
> +	}
>  	return 0;
>  }
>  
> @@ -506,6 +522,11 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
>  static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
>  				    void *data)
>  {
> +	struct rockchip_hdmi *hdmi = container_of(&dev, struct rockchip_hdmi,
> +						  dev);
> +
> +	clk_disable_unprepare(hdmi->hclk_vio);
> +
>  	return dw_hdmi_unbind(dev);
>  }
>  
> 


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