lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CACPK8XekveEuX5vNv7uGVmSEqwLmQMqfdikV4F+xAiwmH9zkxQ@mail.gmail.com>
Date:   Mon, 11 Dec 2017 21:13:58 +1030
From:   Joel Stanley <joel@....id.au>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Andrew Jeffery <andrew@...id.au>,
        Patrick Venture <venture@...gle.com>, Xo Wang <xow@...gle.com>,
        Lei YU <mine260309@...il.com>,
        Cédric Le Goater <clg@...d.org>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Jeremy Kerr <jk@...abs.org>, DTML <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-aspeed@...ts.ozlabs.org
Subject: Re: [PATCH 02/20] dt-bindings: gpio: Add ASPEED constants

On Mon, Dec 11, 2017 at 6:26 PM, Arnd Bergmann <arnd@...db.de> wrote:
> On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley <joel@....id.au> wrote:
>> These are used to by the device tree to map pin numbers to constants
>> required by the GPIO bindings.
>> +
>> +#define ASPEED_GPIO_PORT_A 0
>> +#define ASPEED_GPIO_PORT_B 1
>> +#define ASPEED_GPIO_PORT_C 2
>> +#define ASPEED_GPIO_PORT_D 3
>> +#define ASPEED_GPIO_PORT_E 4
>> +#define ASPEED_GPIO_PORT_F 5
>> +#define ASPEED_GPIO_PORT_G 6
>> +#define ASPEED_GPIO_PORT_H 7
>> +#define ASPEED_GPIO_PORT_I 8
>> +#define ASPEED_GPIO_PORT_J 9
>> +#define ASPEED_GPIO_PORT_K 10
>> +#define ASPEED_GPIO_PORT_L 11
>> +#define ASPEED_GPIO_PORT_M 12
>> +#define ASPEED_GPIO_PORT_N 13
>> +#define ASPEED_GPIO_PORT_O 14
>> +#define ASPEED_GPIO_PORT_P 15
>> +#define ASPEED_GPIO_PORT_Q 16
>> +#define ASPEED_GPIO_PORT_R 17
>> +#define ASPEED_GPIO_PORT_S 18
>> +#define ASPEED_GPIO_PORT_T 19
>> +#define ASPEED_GPIO_PORT_U 20
>> +#define ASPEED_GPIO_PORT_V 21
>> +#define ASPEED_GPIO_PORT_W 22
>> +#define ASPEED_GPIO_PORT_X 23
>> +#define ASPEED_GPIO_PORT_Y 24
>> +#define ASPEED_GPIO_PORT_Z 25
>> +#define ASPEED_GPIO_PORT_AA 26
>> +#define ASPEED_GPIO_PORT_AB 27
>> +#define ASPEED_GPIO_PORT_AC 28
>
> This looks like a 1:1 mapping, wouldn't it be easier to just describe
> it in the binding document?

You're right, it is a linear mapping. We use it so references to GPIO
numbers are human readable in the device tree:

#define ASPEED_GPIO(port, offset) \
        ((ASPEED_GPIO_PORT_##port * 8) + offset)

can be used:

                identify {
                        gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
                };

We find that has cut down on mistakes in calculating offsets into GPIO banks.

Cheers,

Joel

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ