linux-kernel - Re: [RFC] irqchip: add support for LS1021A external interrupt lines

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 11 Dec 2017 15:06:52 +0100
From:   Rasmus Villemoes <rasmus.villemoes@...vas.dk>
To:     Alexander Stein <alexander.stein@...tec-electronic.com>
CC:     Marc Zyngier <marc.zyngier@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [RFC] irqchip: add support for LS1021A external interrupt lines

On 2017-12-11 14:45, Rasmus Villemoes wrote:
> On 2017-12-11 11:02, Alexander Stein wrote:
> 
>> Oh, and what is the content of register SCFG_SCFGREVCR?
> 
> Good point. On my board it's 0xffffffff, set even before U-boot starts,
> and lots board support code in U-boot expects this. I can't immediately
> find examples in the linux source code that actually writes to the scfg,

Not a write, but we do already implicitly assume SCFG_SCFGREVCR is set
to all-ones: In drivers/pci/dwc/pci-layerscape.c, bits which are
numbered 6-11 in the reference manual are extracted with a regmap_read()
followed by a left-shift by 20 and mask with 0x3f. That's consistent
with me setting bit 0 (reference manual enumeration) using 1U<<31.

Rasmus