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Message-Id: <92563f9030ab413ff8f6d5a6b6a5680124ec4d98.1513038011.git.digetx@gmail.com> Date: Tue, 12 Dec 2017 03:26:09 +0300 From: Dmitry Osipenko <digetx@...il.com> To: Thierry Reding <thierry.reding@...il.com>, Jonathan Hunter <jonathanh@...dia.com>, Stephen Warren <swarren@...dotorg.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Mauro Carvalho Chehab <mchehab@...nel.org>, Hans Verkuil <hverkuil@...all.nl>, Vladimir Zapolskiy <vz@...ia.com> Cc: Rob Herring <robh+dt@...nel.org>, Dan Carpenter <dan.carpenter@...cle.com>, linux-media@...r.kernel.org, devel@...verdev.osuosl.org, devicetree@...r.kernel.org, linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org Subject: [PATCH v5 3/4] ARM: dts: tegra20: Add device tree node to describe IRAM From: Vladimir Zapolskiy <vz@...ia.com> All Tegra20 SoCs contain 256KiB IRAM, which is used to store resume code and by a video decoder engine. Signed-off-by: Vladimir Zapolskiy <vz@...ia.com> Signed-off-by: Dmitry Osipenko <digetx@...il.com> --- arch/arm/boot/dts/tegra20.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 914f59166a99..36909df653c3 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -10,6 +10,14 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&lic>; + iram@...00000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + host1x@...00000 { compatible = "nvidia,tegra20-host1x", "simple-bus"; reg = <0x50000000 0x00024000>; -- 2.15.1
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