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Message-ID: <CAEbi=3eo9WqpzaVK_KoGE3JnvwjYGG8bOnbCQTd5RpvrQ_ySTA@mail.gmail.com>
Date: Wed, 13 Dec 2017 18:04:44 +0800
From: Greentime Hu <green.hu@...il.com>
To: Guo Ren <ren_guo@...ky.com>
Cc: Greentime <greentime@...estech.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
linux-arch <linux-arch@...r.kernel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Rob Herring <robh+dt@...nel.org>,
netdev <netdev@...r.kernel.org>,
Vincent Chen <deanbo422@...il.com>,
DTML <devicetree@...r.kernel.org>,
Al Viro <viro@...iv.linux.org.uk>,
David Howells <dhowells@...hat.com>,
Will Deacon <will.deacon@....com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
linux-serial@...r.kernel.org,
Geert Uytterhoeven <geert.uytterhoeven@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Mark Rutland <mark.rutland@....com>, Greg KH <greg@...ah.com>,
Vincent Chen <vincentc@...estech.com>
Subject: Re: [PATCH v3 09/33] nds32: Cache and TLB routines
2017-12-13 17:45 GMT+08:00 Guo Ren <ren_guo@...ky.com>:
> Hello,
>
> CPU team could improve the tlbop_*. Eg: Design a hardware
> internal flag bit for SR_TLB_VPN, tlbop_* will invalid it and mtsr
> SR_TLB_VPN will valid it.
>
> So:
> On Wed, Dec 13, 2017 at 05:03:33PM +0800, Greentime Hu wrote:
>> mtsr addr1 NDS32_SR_TLB_VPN
>> interrupt coming
>> mtsr addr2 NDS32_SR_TLB_VPN <- TLB_VPN has been set to addr2
> mtsr SR_TLB_VPN will valid the flag bit
>> tlbop_rwr(*pte);
> tlbop_rwr will invalid SR_TLB_VPN flag bit
>> interrupt finish
>> tlbop_rwr(*pte); <- it will use the wrong TLB_VPN
> Because SR_TLB_VPN is in a invalid state, no operation happen on
> tlbop_rwr.
>
> Then they are atomic safe ,no spin_lock_irq need.
> :)
>
Oh, I see. I may propose this idea to our ARCH colleagues for the next
version design.
Many thanks.
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