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Message-ID: <e7462b54-9d3a-abfd-8df2-2db3780de78d@huawei.com>
Date: Thu, 14 Dec 2017 14:07:38 +0800
From: Bob Liu <liubo95@...wei.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H . Peter Anvin" <hpa@...or.com>,
"Alex Williamson" <alex.williamson@...hat.com>,
Joerg Roedel <joro@...tes.org>,
David Woodhouse <dwmw2@...radead.org>
CC: Rik van Riel <riel@...hat.com>, Michal Hocko <mhocko@...e.com>,
Dave Jiang <dave.jiang@...el.com>,
Dave Hansen <dave.hansen@...el.com>, <x86@...nel.org>,
<linux-kernel@...r.kernel.org>, <linux-mm@...ck.org>,
<iommu@...ts.linux-foundation.org>,
Vegard Nossum <vegard.nossum@...cle.com>,
Andy Lutomirski <luto@...nel.org>,
Huang Ying <ying.huang@...el.com>,
"Matthew Wilcox" <willy@...ux.intel.com>,
Andrew Morton <akpm@...ux-foundation.org>,
"Paul E . McKenney" <paulmck@...ux.vnet.ibm.com>,
"Kirill A . Shutemov" <kirill.shutemov@...ux.intel.com>,
Kees Cook <keescook@...omium.org>,
"xieyisheng (A)" <xieyisheng1@...wei.com>
Subject: Re: [PATCH 1/2] mm: Add kernel MMU notifier to manage IOTLB/DEVTLB
On 2017/12/14 11:38, Lu Baolu wrote:
> Hi,
>
> On 12/14/2017 11:10 AM, Bob Liu wrote:
>> On 2017/12/14 9:02, Lu Baolu wrote:
>>>> From: Huang Ying <ying.huang@...el.com>
>>>>
>>>> Shared Virtual Memory (SVM) allows a kernel memory mapping to be
>>>> shared between CPU and and a device which requested a supervisor
>>>> PASID. Both devices and IOMMU units have TLBs that cache entries
>>>> from CPU's page tables. We need to get a chance to flush them at
>>>> the same time when we flush the CPU TLBs.
>>>>
>>>> We already have an existing MMU notifiers for userspace updates,
>>>> however we lack the same thing for kernel page table updates. To
>> Sorry, I didn't get which situation need this notification.
>> Could you please describe the full scenario?
>
> Okay.
>
> 1. When an SVM capable driver calls intel_svm_bind_mm() with
> SVM_FLAG_SUPERVISOR_MODE set in the @flags, the kernel
> memory page mappings will be shared between CPUs and
> the DMA remapping agent (a.k.a. IOMMU). The page table
> entries will also be cached in both IOTLB (located in IOMMU)
> and the DEVTLB (located in device).
>
But who/what kind of real device has the requirement to access a kernel VA?
Looks like SVM_FLAG_SUPERVISOR_MODE is used by nobody?
Cheers,
Liubo
> 2. When vmalloc/vfree interfaces are called, the page mappings
> for kernel memory might get changed. And current code calls
> flush_tlb_kernel_range() to flush CPU TLBs only. The IOTLB or
> DevTLB will be stale compared to that on the cpu for kernel
> mappings.
>
> We need a kernel mmu notification to flush TLBs in IOMMU and
> devices as well.
>
> Best regards,
> Lu Baolu
>
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