linux-kernel - Re: [PATCH V2] KVM/x86: Check input paging mode when cs.l is set

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Message-ID: <c2a64686-f163-6187-fe6f-9aea3f5e1084@intel.com>
Date:   Thu, 14 Dec 2017 22:14:01 +0800
From:   "Lan, Tianyu" <tianyu.lan@...el.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     rkrcmar@...hat.com, tglx@...utronix.de, mingo@...hat.com,
        hpa@...or.com, x86@...nel.org, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, dvyukov@...gle.com,
        jmattson@...gle.com
Subject: Re: [PATCH V2] KVM/x86: Check input paging mode when cs.l is set



On 12/14/2017 7:41 PM, Paolo Bonzini wrote:
> On 14/12/2017 04:55, Lan Tianyu wrote:
>> +	 * When EFER.LME and CR0.PG are set, CR4.PAE and EFER.LMA
>> +	 * must be set.
>> +	 */
>> +	if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) {
>> +		if (!(sregs->cr4 & X86_CR4_PAE_BIT))
>> +			return -EINVAL;
>> +		if (!(sregs->efer & EFER_LMA))
>> +			return -EINVAL;
>> +	} else if (sregs->efer & EFER_LMA)
> 
> This can just be "(sregs->efer & EFER_LMA) || sregs->cs.l", making the
> next "if" redundant.  Even better written as
> 
> 	if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) {
> 		/*
> 		 * When EFER.LME and CR0.PG are set, the processor is in
> 		 * 64-bit mode (though maybe in a 32-bit code segment).
> 		 * CR4.PAE and EFER.LMA must be set.
> 		 */
> 		if (... || ...)
> 			return -EINVAL;
> 	} else {
> 		/*
> 		 * Not in 64-bit mode: EFER.LMA is clear and the code
> 		 * segment cannot be 64-bit.
> 		 */
> 		if (... || ...)
> 			return -EINVAL;
> 	}
> 
> Paolo

OK. Thanks for your guide. just send v3. Please have a look.