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Message-ID: <20171215231034.wf6fhpbu7eqbjfp4@rob-hp-laptop>
Date: Fri, 15 Dec 2017 17:10:34 -0600
From: Rob Herring <robh@...nel.org>
To: Abhishek Sahu <absahu@...eaurora.org>
Cc: Stephen Boyd <sboyd@...eaurora.org>,
Michael Turquette <mturquette@...libre.com>,
Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 10/11] dt-bindings: clock: qcom: add misc resets for
PCIE and NSS
On Wed, Dec 13, 2017 at 07:55:41PM +0530, Abhishek Sahu wrote:
> PCIE and NSS has MISC reset register in which single register has
> multiple reset bit. The patch adds the DT bindings for these MISC
> resets.
>
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
> include/dt-bindings/clock/qcom,gcc-ipq8074.h | 42 ++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
Reviewed-by: Rob Herring <robh@...nel.org>
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