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Message-ID: <ca648552-cefb-e19d-72cf-8b56e97b013d@gmail.com>
Date: Mon, 18 Dec 2017 08:24:21 +0200
From: Stefan Mavrodiev <stefan.mavrodiev@...il.com>
To: Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc: Stefan Mavrodiev <stefan@...mex.com>, linux-sunxi@...glegroups.com,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@...linux.org.uk>,
Chen-Yu Tsai <wens@...e.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM PORT" <linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
On 12/15/2017 05:08 PM, Maxime Ripard wrote:
> Hi,
>
> On Thu, Dec 14, 2017 at 08:24:54AM +0200, Stefan Mavrodiev wrote:
>> On 12/13/2017 05:40 PM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
>>>> Allwinner A10/A13/A20 SoCs have pinmux for spi0
>>>> on port C. The patch adds these pins in the respective
>>>> dts includes.
>>>>
>>>> Signed-off-by: Stefan Mavrodiev <stefan@...mex.com>
>>> Do you have any boards that are using these?
>>>
>>> We won't merge that patch if there's no users for it.
>> A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash.
>> For A13 we still doesn't have that option.
> If this bus is exposed on the headers, you can add those to the DT but
> leave them disabled if you want. Buf if there's no users of those
> nodes, our policy is not to merge them.
So basically I should resend the patch, enabling the those pins only for
sun4i and sun7i platform?
>
> Thanks!
> Maxime
>
Regards,
Stefan Mavrodiev
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