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Message-ID: <20171219201618.GA31009@codeaurora.org>
Date: Tue, 19 Dec 2017 12:16:18 -0800
From: Stephen Boyd <sboyd@...eaurora.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: Jingoo Han <jingoohan1@...il.com>,
Joao Pinto <Joao.Pinto@...opsys.com>,
linux-kernel@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
linux-pci@...r.kernel.org
Subject: Re: [PATCH] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity
On 12/11, Lorenzo Pieralisi wrote:
> On Tue, Nov 28, 2017 at 04:53:34PM -0800, Stephen Boyd wrote:
> > We have macros for getting the upper or lower 32 bits of a
> > number. Use them here to shave a couple lines off the code.
> >
> > Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
> > ---
> > drivers/pci/dwc/pcie-designware-host.c | 6 ++----
> > 1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> > index 157621175147..ae5abfddf8de 100644
> > --- a/drivers/pci/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> > @@ -89,10 +89,8 @@ void dw_pcie_msi_init(struct pcie_port *pp)
> > msi_target = virt_to_phys((void *)pp->msi_data);
> >
> > /* program the msi_data */
> > - dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
> > - (u32)(msi_target & 0xffffffff));
> > - dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
> > - (u32)(msi_target >> 32 & 0xffffffff));
> > + dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, lower_32_bits(msi_target));
> > + dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target));
> > }
>
> Hi Stephen,
>
> I was about to apply it but I think that for consistency it would be
> better to convert to {lower,upper}_32_bits() also code in
> dw_msi_setup_msg() and slightly reword the log accordingly; if you do
> not mind sending a v2 with those changes I will apply then.
>
Ok. v2 coming shortly.
--
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