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Message-Id: <d12638e1-3860-1540-4397-8a0fa5cc758d@au1.ibm.com>
Date:   Tue, 19 Dec 2017 11:47:21 +1100
From:   Andrew Donnellan <andrew.donnellan@....ibm.com>
To:     Frederic Barrat <fbarrat@...ux.vnet.ibm.com>,
        linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Cc:     gregkh@...uxfoundation.org, alastair@....ibm.com, arnd@...db.de
Subject: Re: [PATCH 03/13] powerpc/powernv: Add opal calls for opencapi

On 19/12/17 02:21, Frederic Barrat wrote:
> Add opal calls to interact with the NPU:
> 
> OPAL_NPU_SPA_SETUP: set the Shared Process Area (SPA)
> The SPA is a table containing one entry (Process Element) per memory
> context which can be accessed by the opencapi device.
> 
> OPAL_NPU_SPA_CLEAR_CACHE: clear the context cache
> The NPU keeps a cache of recently accessed memory contexts. When a
> Process Element is removed from the SPA, the cache for the link must
> be cleared.
> 
> OPAL_NPU_TL_SET: configure the Transaction Layer
> The Transaction Layer specification defines several templates for
> messages to be exchanged on the link. During link setup, the host and
> device must negotiate what templates are supported on both sides and
> at what rates those messages can be sent.
> 
> 
> Signed-off-by: Frederic Barrat <fbarrat@...ux.vnet.ibm.com>

Corresponding skiboot patch: https://patchwork.ozlabs.org/patch/849830/

Acked-by: Andrew Donnellan <andrew.donnellan@....ibm.com>

> ---
>   arch/powerpc/include/asm/opal-api.h            | 5 ++++-
>   arch/powerpc/include/asm/opal.h                | 6 ++++++
>   arch/powerpc/platforms/powernv/opal-wrappers.S | 3 +++
>   3 files changed, 13 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h
> index 233c7504b1f2..24c73f5575ee 100644
> --- a/arch/powerpc/include/asm/opal-api.h
> +++ b/arch/powerpc/include/asm/opal-api.h
> @@ -201,7 +201,10 @@
>   #define OPAL_SET_POWER_SHIFT_RATIO		155
>   #define OPAL_SENSOR_GROUP_CLEAR			156
>   #define OPAL_PCI_SET_P2P			157
> -#define OPAL_LAST				157
> +#define OPAL_NPU_SPA_SETUP			159
> +#define OPAL_NPU_SPA_CLEAR_CACHE		160
> +#define OPAL_NPU_TL_SET				161
> +#define OPAL_LAST				161
>   
>   /* Device tree flags */
>   
> diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
> index 0c545f7fc77b..12e70fb58700 100644
> --- a/arch/powerpc/include/asm/opal.h
> +++ b/arch/powerpc/include/asm/opal.h
> @@ -34,6 +34,12 @@ int64_t opal_npu_init_context(uint64_t phb_id, int pasid, uint64_t msr,
>   			uint64_t bdf);
>   int64_t opal_npu_map_lpar(uint64_t phb_id, uint64_t bdf, uint64_t lparid,
>   			uint64_t lpcr);
> +int64_t opal_npu_spa_setup(uint64_t phb_id, uint32_t bdfn,
> +			uint64_t addr, uint64_t PE_mask);
> +int64_t opal_npu_spa_clear_cache(uint64_t phb_id, uint32_t bdfn,
> +				uint64_t PE_handle);
> +int64_t opal_npu_tl_set(uint64_t phb_id, uint32_t bdfn, long cap,
> +			uint64_t rate_phys, uint32_t size);

The function prototype on the skiboot side has slightly different 
parameter names: long capabilities, uint32_t rate_sz.

>   int64_t opal_console_write(int64_t term_number, __be64 *length,
>   			   const uint8_t *buffer);
>   int64_t opal_console_read(int64_t term_number, __be64 *length,
> diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
> index 6f4b00a2ac46..1b2936ba6040 100644
> --- a/arch/powerpc/platforms/powernv/opal-wrappers.S
> +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
> @@ -320,3 +320,6 @@ OPAL_CALL(opal_set_powercap,			OPAL_SET_POWERCAP);
>   OPAL_CALL(opal_get_power_shift_ratio,		OPAL_GET_POWER_SHIFT_RATIO);
>   OPAL_CALL(opal_set_power_shift_ratio,		OPAL_SET_POWER_SHIFT_RATIO);
>   OPAL_CALL(opal_sensor_group_clear,		OPAL_SENSOR_GROUP_CLEAR);
> +OPAL_CALL(opal_npu_spa_setup,			OPAL_NPU_SPA_SETUP);
> +OPAL_CALL(opal_npu_spa_clear_cache,		OPAL_NPU_SPA_CLEAR_CACHE);
> +OPAL_CALL(opal_npu_tl_set,			OPAL_NPU_TL_SET);
> 

-- 
Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan@....ibm.com  IBM Australia Limited

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