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Date:   Tue, 19 Dec 2017 10:35:57 +0900
From:   Masami Hiramatsu <mhiramat@...nel.org>
To:     Ingo Molnar <mingo@...nel.org>
Cc:     Randy Dunlap <rdunlap@...radead.org>,
        LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Masami Hiramatsu <mhiramat@...nel.org>
Subject: Re: [PATCH v2] x86: update/correct opcodes map

On Fri, 15 Dec 2017 13:35:47 +0100
Ingo Molnar <mingo@...nel.org> wrote:

> 
> * Randy Dunlap <rdunlap@...radead.org> wrote:
> 
> > From: Randy Dunlap <rdunlap@...radead.org>
> > 
> > Update x86-opcode-map.txt based on the October 2017 Intel SDM publication.
> > Correct INVPID to INVVPID.
> > Add UD0 and UD1 instruction opcodes.
> > 
> > Signed-off-by: Randy Dunlap <rdunlap@...radead.org>
> > Cc: Masami Hiramatsu <mhiramat@...nel.org>
> > Cc: Masami Hiramatsu <masami.hiramatsu@...il.com>
> > Cc: Josh Poimboeuf <jpoimboe@...hat.com>
> > Cc: x86 maintainers <x86@...nel.org>
> > ---
> > 
> > v2 changes:
> > . correct email address.
> > . add full Grp10 table
> > . use # comments as requested
> > 
> >  arch/x86/lib/x86-opcode-map.txt |   15 ++++++++++++---
> >  1 file changed, 12 insertions(+), 3 deletions(-)
> > 
> > 
> > --- lnx-415-rc3.orig/arch/x86/lib/x86-opcode-map.txt
> > +++ lnx-415-rc3/arch/x86/lib/x86-opcode-map.txt
> > @@ -533,7 +533,7 @@ b5: LGS Gv,Mp
> >  b6: MOVZX Gv,Eb
> >  b7: MOVZX Gv,Ew
> >  b8: JMPE (!F3) | POPCNT Gv,Ev (F3)
> > -b9: Grp10 (1A)
> > +b9: Grp10 (1A) # all UD1
> 
> This change breaks the tools/objtool parser:
> 
>   GEN      arch/x86/insn/inat-tables.c
>  Semantic error at 536: # is not a separator
>  arch/x86/Build:7: recipe for target 'arch/x86/insn/inat-tables.c' failed
> 
> so I left it out for the time being.
>

Oops, thank you, I'll fix parser to support comment in line.

Thanks!
 
> Thanks,
> 
> 	Ingo


-- 
Masami Hiramatsu <mhiramat@...nel.org>

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