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Message-ID: <b0d8147a-46e1-0787-ae37-9c1ef957d190@codeaurora.org>
Date:   Wed, 20 Dec 2017 11:55:33 +0530
From:   Sricharan R <sricharan@...eaurora.org>
To:     Viresh Kumar <viresh.kumar@...aro.org>
Cc:     robh+dt@...nel.org, mark.rutland@....com, mturquette@...libre.com,
        sboyd@...eaurora.org, linux@...linux.org.uk, andy.gross@...aro.org,
        david.brown@...aro.org, rjw@...ysocki.net,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-pm@...r.kernel.org
Subject: Re: [PATCH v5 15/15] devicetree: bindings: Document qcom,pvs

Hi Viresh,

On 12/20/2017 8:56 AM, Viresh Kumar wrote:
> On 19-12-17, 21:25, Sricharan R wrote:
>> +	cpu@0 {
>> +		compatible = "qcom,krait";
>> +		enable-method = "qcom,kpss-acc-v1";
>> +		device_type = "cpu";
>> +		reg = <0>;
>> +		qcom,acc = <&acc0>;
>> +		qcom,saw = <&saw0>;
>> +		clocks = <&kraitcc 0>;
>> +		clock-names = "cpu";
>> +		cpu-supply = <&smb208_s2a>;
>> +		operating-points-v2 = <&cpu_opp_table>;
>> +	};
>> +
>> +	qcom,pvs {
>> +		qcom,pvs-format-a;
>> +	};
> 
> Not sure what Rob is going to say on that :)
> 

 Yes. Would be good to know the best way.

>> +
>> +
>> +	cpu_opp_table: opp_table {
>> +		compatible = "operating-points-v2";
>> +
>> +		/*
>> +		 * Missing opp-shared property means CPUs switch DVFS states
>> +		 * independently.
>> +		 */
>> +
>> +		opp-1400000000 {
>> +			opp-hz = /bits/ 64 <1400000000>;
>> +			opp-microvolt-speed0-pvs0-v0 = <1250000>;
> 
> Why speed0 and v0 in all the names ?
> 

 Ya, all the three (speed, pvs and version) are read from efuse. So all the three
 can vary.

Regards,
 Sricharan

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