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Date:   Wed, 20 Dec 2017 09:07:39 -0800
From:   Jim Mattson <jmattson@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     LKML <linux-kernel@...r.kernel.org>,
        kvm list <kvm@...r.kernel.org>,
        David Hildenbrand <david@...hat.com>
Subject: Re: [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro

Reviewed-by: Jim Mattson <jmattson@...gle.com>

On Wed, Dec 20, 2017 at 4:05 AM, Paolo Bonzini <pbonzini@...hat.com> wrote:
> Remove duplicate expression in nested_vmx_prepare_msr_bitmap, and make
> the register names clearer in hardware_setup.
>
> Suggested-by: Jim Mattson <jmattson@...gle.com>
> Signed-off-by: Paolo Bonzini <pbonzini@...hat.com>
> ---
>  arch/x86/kvm/vmx.c | 19 +++++++++----------
>  1 file changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 905aaa778306..65e09096a5ab 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -5256,6 +5256,8 @@ static void pt_disable_intercept_for_msr(bool flag)
>         }
>  }
>
> +#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4))
> +
>  static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_active)
>  {
>         if (apicv_active) {
> @@ -7136,7 +7138,7 @@ static __init int hardware_setup(void)
>         set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
>
>         for (msr = 0x800; msr <= 0x8ff; msr++) {
> -               if (msr == 0x839 /* TMCCT */)
> +               if (msr == X2APIC_MSR(APIC_TMCCT))
>                         continue;
>                 vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);
>         }
> @@ -7145,12 +7147,9 @@ static __init int hardware_setup(void)
>          * TPR reads and writes can be virtualized even if virtual interrupt
>          * delivery is not in use.
>          */
> -       vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
> -
> -       /* EOI */
> -       vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);
> -       /* SELF-IPI */
> -       vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);
> +       vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_R | MSR_TYPE_W, false);
> +       vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_EOI), MSR_TYPE_W, true);
> +       vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W, true);
>
>         if (enable_ept)
>                 vmx_enable_tdp();
> @@ -10344,17 +10343,17 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu,
>
>         nested_vmx_disable_intercept_for_msr(
>                 msr_bitmap_l1, msr_bitmap_l0,
> -               APIC_BASE_MSR + (APIC_TASKPRI >> 4),
> +               X2APIC_MSR(APIC_TASKPRI),
>                 MSR_TYPE_W);
>
>         if (nested_cpu_has_vid(vmcs12)) {
>                 nested_vmx_disable_intercept_for_msr(
>                         msr_bitmap_l1, msr_bitmap_l0,
> -                       APIC_BASE_MSR + (APIC_EOI >> 4),
> +                       X2APIC_MSR(APIC_EOI),
>                         MSR_TYPE_W);
>                 nested_vmx_disable_intercept_for_msr(
>                         msr_bitmap_l1, msr_bitmap_l0,
> -                       APIC_BASE_MSR + (APIC_SELF_IPI >> 4),
> +                       X2APIC_MSR(APIC_SELF_IPI),
>                         MSR_TYPE_W);
>         }
>         kunmap(page);
> --
> 1.8.3.1
>

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