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Message-Id: <1513799967-22454-2-git-send-email-sohil.mehta@intel.com>
Date: Wed, 20 Dec 2017 11:59:24 -0800
From: Sohil Mehta <sohil.mehta@...el.com>
To: Joerg Roedel <joro@...tes.org>,
Alex Williamson <alex.williamson@...hat.com>
Cc: David Woodhouse <dwmw2@...radead.org>,
Ashok Raj <ashok.raj@...el.com>,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Gayatri Kammela <gayatri.kammela@...el.com>,
Sohil Mehta <sohil.mehta@...el.com>,
Ravi V Shankar <ravi.v.shankar@...el.com>,
Andy Shevchenko <andriy.shevchenko@...el.com>,
Lu Baolu <baolu.lu@...ux.intel.com>,
Fenghua Yu <fenghua.yu@...el.com>,
Kirill Shutemov <kirill.shutemov@...ux.intel.com>,
Dave Hansen <dave.hansen@...el.com>
Subject: [PATCH 1/4] iommu/vt-d: Enable upto 57 bits of domain address width
Update the IOMMU default domain address width to 57 bits. This would
enable the IOMMU to do upto 5-levels of paging for second level
translations - IOVA translation requests without PASID.
Even though the maximum supported address width is being increased to
57, __iommu_calculate_agaw() would set the actual supported address
width to the maximum support available in IOMMU hardware.
Signed-off-by: Sohil Mehta <sohil.mehta@...el.com>
---
drivers/iommu/intel-iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4a2de34..457795b 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -64,7 +64,7 @@
#define IOAPIC_RANGE_END (0xfeefffff)
#define IOVA_START_ADDR (0x1000)
-#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48
+#define DEFAULT_DOMAIN_ADDRESS_WIDTH 57
#define MAX_AGAW_WIDTH 64
#define MAX_AGAW_PFN_WIDTH (MAX_AGAW_WIDTH - VTD_PAGE_SHIFT)
--
2.7.4
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