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Message-ID: <alpine.DEB.2.20.1712200124440.2282@nanos>
Date:   Wed, 20 Dec 2017 01:31:25 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Alexandru Chirvasitu <achirvasub@...il.com>
cc:     Pavel Machek <pavel@....cz>,
        kernel list <linux-kernel@...r.kernel.org>,
        Ingo Molnar <mingo@...hat.com>,
        "Maciej W. Rozycki" <macro@...ux-mips.org>,
        Mikael Pettersson <mikpelinux@...il.com>,
        Josh Poulson <jopoulso@...rosoft.com>,
        Mihai Costache <v-micos@...rosoft.com>,
        Stephen Hemminger <sthemmin@...rosoft.com>,
        Marc Zyngier <marc.zyngier@....com>, linux-pci@...r.kernel.org,
        Haiyang Zhang <haiyangz@...rosoft.com>,
        Dexuan Cui <decui@...rosoft.com>,
        Simon Xiao <sixiao@...rosoft.com>,
        Saeed Mahameed <saeedm@...lanox.com>,
        Jork Loeser <Jork.Loeser@...rosoft.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        devel@...uxdriverproject.org, KY Srinivasan <kys@...rosoft.com>,
        Dou Liyang <douly.fnst@...fujitsu.com>
Subject: Re: PROBLEM: 4.15.0-rc3 APIC causes lockups on Core 2 Duo laptop

On Tue, 19 Dec 2017, Alexandru Chirvasitu wrote:

> I had never heard of 'bisect' before this casual mention (you might tell
> I am a bit out of my depth). I've since applied it to Linus' tree between

> bebc608 Linux 4.14 (good)
> 
> and
> 
> 4fbd8d1 Linux 4.15-rc1 (bad)

Is Linus current head 4.15-rc4 bad as well?

> It took about 13 attempts (I had access to a faster machine to compile
> on, and ccache helped once the cache built up some momentum). The result
> is (as presented by 'git bisect' at the end of the process, between the
> --- dividers added by me for clarity):

> --- start of output ---
> 
> 2b5175c4fa974b6aa05bbd2ee8d443a8036a1714 is the first bad commit
> commit 2b5175c4fa974b6aa05bbd2ee8d443a8036a1714
> Author: Thomas Gleixner <tglx@...utronix.de>
> Date:   Tue Oct 17 09:54:57 2017 +0200
> 
>     genirq: Add config option for reservation mode
>     
>     The interrupt reservation mode requires reactivation of PCI/MSI
>     interrupts. Create a config option, so the PCI code can set the
>     corresponding flag when required.
>     
>     Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
>     Cc: Josh Poulson <jopoulso@...rosoft.com>
>     Cc: Mihai Costache <v-micos@...rosoft.com>
>     Cc: Stephen Hemminger <sthemmin@...rosoft.com>
>     Cc: Marc Zyngier <marc.zyngier@....com>
>     Cc: linux-pci@...r.kernel.org
>     Cc: Haiyang Zhang <haiyangz@...rosoft.com>
>     Cc: Dexuan Cui <decui@...rosoft.com>
>     Cc: Simon Xiao <sixiao@...rosoft.com>
>     Cc: Saeed Mahameed <saeedm@...lanox.com>
>     Cc: Jork Loeser <Jork.Loeser@...rosoft.com>
>     Cc: Bjorn Helgaas <bhelgaas@...gle.com>
>     Cc: devel@...uxdriverproject.org
>     Cc: KY Srinivasan <kys@...rosoft.com>
>     Link: https://lkml.kernel.org/r/20171017075600.369375409@linutronix.de
> 
> :040000 040000 5e73031cc0c8411a20722cce7876ab7b82ed3858 dcf98e7a6b7d5f7c5353b7ccab02125e6d332ec8 M      kernel
> 
> --- end of output ---
> 
> Consequently, I am cc-ing in the listed addresses.

Thanks for doing that bisect, but unfortunately this commit cannot be the
problematic one, It merily adds a config symbol, but it does not change any
code at all. It has no effect whatsoever. So something might have gone
wrong in your bisecting.

I CC'ed Dou Liyang. He has changed the early APIC setup code and there has
been an issue reported already. Though I lost track of that. Dou, any
pointers?

Thanks,

	tglx


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