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Date:   Wed, 20 Dec 2017 23:26:13 +0000
From:   "Yu, Fenghua" <fenghua.yu@...el.com>
To:     Randy Dunlap <rdunlap@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...e.hu>,
        "H. Peter Anvin" <hpa@...ux.intel.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        "Shivappa, Vikas" <vikas.shivappa@...el.com>,
        "Shankar, Ravi V" <ravi.v.shankar@...el.com>,
        "Prakhya, Sai Praneeth" <sai.praneeth.prakhya@...el.com>,
        "Chatre, Reinette" <reinette.chatre@...el.com>,
        linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: RE: [PATCH 4/6] x86/intel_rdt: Add two new resources for L2 Code
 and Data Prioritization (CDP)

> > When L2 CDP is enabled, the schemata will have the two resources in
> > this format:
> > L2DATA:l2id0=xxxx;l2id1=xxxx;....
> > L2CODE:l2id0=xxxx;l2id1=xxxx;....
> 
> Hi,
> 
> What do the xxxx represent?

The xxxx represents CBM (Cache Bit Mask) values in the schemata, similar to all others (L2 CAT/L3 CAT/L3 CDP).

Thanks.

-Fenghua

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