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Date:   Thu, 21 Dec 2017 09:54:09 +0900
From:   Chanwoo Choi <cw00.choi@...sung.com>
To:     Krzysztof Kozlowski <krzk@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Kukjin Kim <kgene@...nel.org>,
        Marek Szyprowski <m.szyprowski@...sung.com>,
        Andrzej Hajda <a.hajda@...sung.com>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: exynos: Fix typo in MSCL clock
 controller unit address

On 2017년 12월 21일 04:27, Krzysztof Kozlowski wrote:
> Fix typo in unit address of MSCL clock controller (the reg entry is
> correct).
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 0ba5df825eff..3e8311c60d1b 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -468,7 +468,7 @@
>  			clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>;
>  		};
>  
> -		cmu_mscl: clock-controller@...d0000 {
> +		cmu_mscl: clock-controller@...d0000 {
>  			compatible = "samsung,exynos5433-cmu-mscl";
>  			reg = <0x150d0000 0x1000>;
>  			#clock-cells = <1>;
> 

Looks good to me.
Reviewed-by: Chanwoo Choi <cw00.choi@...sung.com>

-- 
Best Regards,
Chanwoo Choi
Samsung Electronics

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