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Message-ID: <37306EFA9975BE469F115FDE982C075BCE890886@ORSMSX114.amr.corp.intel.com>
Date:   Thu, 21 Dec 2017 16:37:34 +0000
From:   "Christopherson, Sean J" <sean.j.christopherson@...el.com>
To:     Andy Lutomirski <luto@...nel.org>,
        Paolo Bonzini <pbonzini@...hat.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        kvm list <kvm@...r.kernel.org>,
        Laszlo Ersek <lersek@...hat.com>
Subject: RE: [PATCH] kvm: x86: fix RSM when PCID is non-zero

On Thu, Dec 21, 2017 at 07:30:35AM -0800, Andy Lutomirski wrote:
> On Thu, Dec 21, 2017 at 3:56 AM, Paolo Bonzini <pbonzini@...hat.com> wrote:
> > rsm_load_state_64() and rsm_enter_protected_mode() load CR3, then
> > CR4 & ~PCIDE, then CR0, then CR4.
> >
> > However, setting CR4.PCIDE fails if CR3[11:0] != 0.  It's probably easier
> > in the long run to replace rsm_enter_protected_mode() with an emulator
> > callback that sets all the special registers (like KVM_SET_SREGS would
> > do).  For now, set the PCID field of CR3 only after CR4.PCIDE is 1.
>
> Out of curiosity, has anyone ever tested RSM returning to PAE mode?  I
> *think* it's supposed to restore the PDPTR registers directly rather
> than reloading them from the memory pointed to by CR3, and it doesn't
> look like the new or old code does it.

Yes, PDPTRs are saved/loaded to/from SMRAM, at least on Intel hardware.

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