lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 21 Dec 2017 10:49:35 +0800
From:   Yong <yong.deng@...ewell.com>
To:     Sakari Ailus <sakari.ailus@....fi>
Cc:     maxime.ripard@...e-electrons.com,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Chen-Yu Tsai <wens@...e.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "David S. Miller" <davem@...emloft.net>,
        Hans Verkuil <hverkuil@...all.nl>,
        Arnd Bergmann <arnd@...db.de>,
        Hugues Fruchet <hugues.fruchet@...com>,
        Yannick Fertre <yannick.fertre@...com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Benoit Parrot <bparrot@...com>,
        Benjamin Gaignard <benjamin.gaignard@...aro.org>,
        Jean-Christophe Trotin <jean-christophe.trotin@...com>,
        Ramesh Shanmugasundaram <ramesh.shanmugasundaram@...renesas.com>,
        Minghsiu Tsai <minghsiu.tsai@...iatek.com>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Robert Jarzmik <robert.jarzmik@...e.fr>,
        linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: Re: [PATCH v2 2/3] dt-bindings: media: Add Allwinner V3s Camera
 Sensor Interface (CSI)

Hi,

On Tue, 19 Dec 2017 13:53:28 +0200
Sakari Ailus <sakari.ailus@....fi> wrote:

> Hi Yong,
> 
> On Thu, Jul 27, 2017 at 01:01:36PM +0800, Yong Deng wrote:
> > Add binding documentation for Allwinner V3s CSI.
> > 
> > Signed-off-by: Yong Deng <yong.deng@...ewell.com>
> 
> DT bindings should precede the driver.

OK.

> 
> > ---
> >  .../devicetree/bindings/media/sun6i-csi.txt        | 49 ++++++++++++++++++++++
> >  1 file changed, 49 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/media/sun6i-csi.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/media/sun6i-csi.txt b/Documentation/devicetree/bindings/media/sun6i-csi.txt
> > new file mode 100644
> > index 0000000..f8d83f6
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/sun6i-csi.txt
> > @@ -0,0 +1,49 @@
> > +Allwinner V3s Camera Sensor Interface
> > +------------------------------
> > +
> > +Required properties:
> > +  - compatible: value must be "allwinner,sun8i-v3s-csi"
> 
> What are sun6i and sun8i? Is this device first present in sun6i SoCs,
> whereas you have only defined bindings for sun8i?

Yes, some sun6i SoCs has the almost same CSI module.
There is only V3s on my hand. So, I only tested it on V3s. But
some people work on the others.

> 
> > +  - reg: base address and size of the memory-mapped region.
> > +  - interrupts: interrupt associated to this IP
> > +  - clocks: phandles to the clocks feeding the CSI
> > +    * ahb: the CSI interface clock
> > +    * mod: the CSI module clock
> > +    * ram: the CSI DRAM clock
> > +  - clock-names: the clock names mentioned above
> > +  - resets: phandles to the reset line driving the CSI
> > +
> > +- ports: A ports node with endpoint definitions as defined in
> > +  Documentation/devicetree/bindings/media/video-interfaces.txt.
> 
> Please document mandatory and optional endpoint properties relevant for the
> hardware.

I have added below commit in my v3:
Currently, the driver only support the parallel interface. So, a single port
node with one endpoint and parallel bus is supported.

> 
> > +
> > +Example:
> > +
> > +	csi1: csi@...b4000 {
> > +		compatible = "allwinner,sun8i-v3s-csi";
> > +		reg = <0x01cb4000 0x1000>;
> > +		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> > +		clocks = <&ccu CLK_BUS_CSI>,
> > +			 <&ccu CLK_CSI1_SCLK>,
> > +			 <&ccu CLK_DRAM_CSI>;
> > +		clock-names = "ahb", "mod", "ram";
> > +		resets = <&ccu RST_BUS_CSI>;
> > +
> > +		port {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +
> > +			/* Parallel bus endpoint */
> > +			csi1_ep: endpoint {
> > +				remote-endpoint = <&adv7611_ep>;
> > +				bus-width = <16>;
> > +				data-shift = <0>;
> > +
> > +				/* If hsync-active/vsync-active are missing,
> > +				   embedded BT.656 sync is used */
> > +				hsync-active = <0>; /* Active low */
> > +				vsync-active = <0>; /* Active low */
> > +				data-active = <1>;  /* Active high */
> > +				pclk-sample = <1>;  /* Rising */
> > +			};
> > +		};
> > +	};
> > +
> 
> -- 
> Kind regards,
> 
> Sakari Ailus
> e-mail: sakari.ailus@....fi


Thanks,
Yong

Powered by blists - more mailing lists