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Date:   Thu, 21 Dec 2017 15:02:48 -0800
From:   Stephen Boyd <>
To:     Chunyan Zhang <>
Cc:     Michael Turquette <>,
        Rob Herring <>,
        Mark Rutland <>,
        Catalin Marinas <>,
        Will Deacon <>,,,,,
        Arnd Bergmann <>, Mark Brown <>,
        Xiaolong Zhang <>,
        Ben Li <>,
        Orson Zhai <>,
        Chunyan Zhang <>
Subject: Re: [PATCH V7 07/12] clk: sprd: add adjustable pll support

On 12/07, Chunyan Zhang wrote:
> Introduced a common adjustable pll clock driver for Spreadtrum SoCs.
> Signed-off-by: Chunyan Zhang <>
> ---

Applied to clk-next

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