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Date:   Thu, 21 Dec 2017 15:13:41 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc:     Mike Turquette <mturquette@...libre.com>,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jason Cooper <jason@...edaemon.net>,
        Andrew Lunn <andrew@...n.ch>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        linux-arm-kernel@...ts.infradead.org,
        Antoine Tenart <antoine.tenart@...e-electrons.com>,
        Miquèl Raynal 
        <miquel.raynal@...e-electrons.com>,
        Nadav Haklai <nadavh@...vell.com>,
        Victor Gu <xigu@...vell.com>, Marcin Wojtas <mw@...ihalf.com>,
        Wilson Ding <dingwei@...vell.com>,
        Hua Jing <jinghua@...vell.com>,
        Neta Zur Hershkovits <neta@...vell.com>
Subject: Re: [PATCH 0/3] Add DVFS support on CPU clock for Armada 37xx

On 11/30, Gregory CLEMENT wrote:
> Hi,
> 
> This small series is needed to use DVFS on Armada 37xx. When DVFS is
> enabled the CPU clock setting is done using an other set of registers
> from the North Bridge Power Management block.
> 
> The series adds the possibility to modify the CPU frequency using the
> associate load level matching the target frequency. However
> configuring the frequencies for each load is done by the cpufreq
> driver submitted in a separate series.
> 
> Obviously having both series (cpufreq and clk) is needed to support
> DVFS on Armada 37xx, but there is no dependencies between the series
> (for building or at runtime).
> 

Are you relying on the clk API returning an error to detect if
DVFS is present or not? Just curious why that part of the code
was there.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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