[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20171222002358.GM7997@codeaurora.org>
Date: Thu, 21 Dec 2017 16:23:58 -0800
From: Stephen Boyd <sboyd@...eaurora.org>
To: Abhishek Sahu <absahu@...eaurora.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 05/11] clk: qcom: ipq8074: add remaining PLL’s
On 12/13, Abhishek Sahu wrote:
> - GPLL2, GPLL4 and GPLL6 are general PLL clocks and parent
> for all core peripherals.
> - UBI PLL is mainly used by NSS (Network Switching System).
> IPQ8074 has 2 instances of NSS UBI cores and UBI PLL will
> be used to control the core frequency.
> - NSS Crypto PLL is mainly used by NSS Crypto Engine which
> supports the multiple cryptographic algorithm used in
> Ethernet.
> - IPQ8074 frequency plan does not require change in PLL post
> dividers so marked the same as read-only.
>
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Powered by blists - more mailing lists