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Message-ID: <CAAEAJfDzZJKVX+3f69o0UF6DgcQEW-UEmp-VG9bPkFd2dybYkQ@mail.gmail.com>
Date: Fri, 22 Dec 2017 13:55:54 -0300
From: Ezequiel Garcia <ezequiel@...guardiasur.com.ar>
To: Miquel RAYNAL <miquel.raynal@...e-electrons.com>
Cc: Chris Packham <chris.packham@...iedtelesis.co.nz>,
Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
Richard Weinberger <richard@....at>,
David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Marek Vasut <marek.vasut@...il.com>,
Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
Kalyan Kinthada <kalyan.kinthada@...iedtelesis.co.nz>
Subject: Re: [PATCHv4 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants
On 22 December 2017 at 12:53, Miquel RAYNAL
<miquel.raynal@...e-electrons.com> wrote:
> Hello Chris,
>
> On Fri, 22 Dec 2017 12:19:04 +1300
> Chris Packham <chris.packham@...iedtelesis.co.nz> wrote:
>
>> From: Kalyan Kinthada <kalyan.kinthada@...iedtelesis.co.nz>
>>
>> The Armada-370 based SoCs support arbitration between the NAND Flash
>> interface and NOR (i.e. devbus) on the same chip select. However there
>> are two guidelines that must be followed to avoid data corruption in
>> this scenario.
>
> Sorry to bother you again with that but, do you actually face any
> issue/data corruption with this scenario?
>
Indeed. We need a description of a real world problem this patch is fixing.
--
Ezequiel GarcĂa, VanguardiaSur
www.vanguardiasur.com.ar
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