linux-kernel - Re: [PATCH v4 03/15] clk: ingenic: support PLLs with no bypass bit

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Message-ID: <20171228183612.GJ7997@codeaurora.org>
Date:   Thu, 28 Dec 2017 10:36:12 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Paul Cercueil <paul@...pouillou.net>
Cc:     Ralf Baechle <ralf@...ux-mips.org>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Mark Rutland <mark.rutland@....com>,
        Maarten ter Huurne <maarten@...ewalker.org>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mips@...ux-mips.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 03/15] clk: ingenic: support PLLs with no bypass bit

On 12/28, Paul Cercueil wrote:
> The second PLL of the JZ4770 does not have a bypass bit.
> This commit makes it possible to support it with the current common CGU
> code.
> 
> Signed-off-by: Paul Cercueil <paul@...pouillou.net>
> ---

Acked-by: Stephen Boyd <sboyd@...eaurora.org>

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