| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <201801010003.tmJwwWXU%fengguang.wu@intel.com>
Date: Mon, 1 Jan 2018 00:55:36 +0800
From: kbuild test robot <lkp@...el.com>
To: Jia Zhang <qianyue.zj@...baba-inc.com>
Cc: kbuild-all@...org, bp@...en8.de, mingo@...hat.com, hpa@...or.com,
tglx@...utronix.de, tony.luck@...el.com, x86@...nel.org,
linux-kernel@...r.kernel.org,
Jia Zhang <qianyue.zj@...baba-inc.com>
Subject: Re: [PATCH] x86: clean up confusing x86_mask
Hi Jia,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on v4.15-rc5]
[also build test WARNING on next-20171222]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jia-Zhang/x86-clean-up-confusing-x86_mask/20171231-182946
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
vim +165 drivers/char/hw_random/via-rng.c
135233635 Michael Buesch 2006-06-26 128
135233635 Michael Buesch 2006-06-26 129 static int via_rng_init(struct hwrng *rng)
135233635 Michael Buesch 2006-06-26 130 {
11025e855 Dave Jones 2008-02-06 131 struct cpuinfo_x86 *c = &cpu_data(0);
135233635 Michael Buesch 2006-06-26 132 u32 lo, hi, old_lo;
135233635 Michael Buesch 2006-06-26 133
858576bdc Harald Welte 2009-05-15 134 /* VIA Nano CPUs don't have the MSR_VIA_RNG anymore. The RNG
858576bdc Harald Welte 2009-05-15 135 * is always enabled if CPUID rng_en is set. There is no
858576bdc Harald Welte 2009-05-15 136 * RNG configuration like it used to be the case in this
858576bdc Harald Welte 2009-05-15 137 * register */
858576bdc Harald Welte 2009-05-15 138 if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
362f924b6 Borislav Petkov 2015-12-07 139 if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
7a1ae9c0c Sudip Mukherjee 2014-09-15 140 pr_err(PFX "can't enable hardware RNG "
858576bdc Harald Welte 2009-05-15 141 "if XSTORE is not enabled\n");
858576bdc Harald Welte 2009-05-15 142 return -ENODEV;
858576bdc Harald Welte 2009-05-15 143 }
858576bdc Harald Welte 2009-05-15 144 return 0;
858576bdc Harald Welte 2009-05-15 145 }
858576bdc Harald Welte 2009-05-15 146
135233635 Michael Buesch 2006-06-26 147 /* Control the RNG via MSR. Tread lightly and pay very close
135233635 Michael Buesch 2006-06-26 148 * close attention to values written, as the reserved fields
135233635 Michael Buesch 2006-06-26 149 * are documented to be "undefined and unpredictable"; but it
135233635 Michael Buesch 2006-06-26 150 * does not say to write them as zero, so I make a guess that
135233635 Michael Buesch 2006-06-26 151 * we restore the values we find in the register.
135233635 Michael Buesch 2006-06-26 152 */
135233635 Michael Buesch 2006-06-26 153 rdmsr(MSR_VIA_RNG, lo, hi);
135233635 Michael Buesch 2006-06-26 154
135233635 Michael Buesch 2006-06-26 155 old_lo = lo;
135233635 Michael Buesch 2006-06-26 156 lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT);
135233635 Michael Buesch 2006-06-26 157 lo &= ~VIA_XSTORE_CNT_MASK;
135233635 Michael Buesch 2006-06-26 158 lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE);
135233635 Michael Buesch 2006-06-26 159 lo |= VIA_RNG_ENABLE;
11025e855 Dave Jones 2008-02-06 160 lo |= VIA_NOISESRC1;
11025e855 Dave Jones 2008-02-06 161
11025e855 Dave Jones 2008-02-06 162 /* Enable secondary noise source on CPUs where it is present. */
11025e855 Dave Jones 2008-02-06 163
11025e855 Dave Jones 2008-02-06 164 /* Nehemiah stepping 8 and higher */
11025e855 Dave Jones 2008-02-06 @165 if ((c->x86_model == 9) && (c->x86_mask > 7))
11025e855 Dave Jones 2008-02-06 166 lo |= VIA_NOISESRC2;
11025e855 Dave Jones 2008-02-06 167
11025e855 Dave Jones 2008-02-06 168 /* Esther */
11025e855 Dave Jones 2008-02-06 169 if (c->x86_model >= 10)
11025e855 Dave Jones 2008-02-06 170 lo |= VIA_NOISESRC2;
135233635 Michael Buesch 2006-06-26 171
135233635 Michael Buesch 2006-06-26 172 if (lo != old_lo)
135233635 Michael Buesch 2006-06-26 173 wrmsr(MSR_VIA_RNG, lo, hi);
135233635 Michael Buesch 2006-06-26 174
135233635 Michael Buesch 2006-06-26 175 /* perhaps-unnecessary sanity check; remove after testing if
135233635 Michael Buesch 2006-06-26 176 unneeded */
135233635 Michael Buesch 2006-06-26 177 rdmsr(MSR_VIA_RNG, lo, hi);
135233635 Michael Buesch 2006-06-26 178 if ((lo & VIA_RNG_ENABLE) == 0) {
7a1ae9c0c Sudip Mukherjee 2014-09-15 179 pr_err(PFX "cannot enable VIA C3 RNG, aborting\n");
135233635 Michael Buesch 2006-06-26 180 return -ENODEV;
135233635 Michael Buesch 2006-06-26 181 }
135233635 Michael Buesch 2006-06-26 182
135233635 Michael Buesch 2006-06-26 183 return 0;
135233635 Michael Buesch 2006-06-26 184 }
135233635 Michael Buesch 2006-06-26 185
:::::: The code at line 165 was first introduced by commit
:::::: 11025e855235144271a0e447e3650b203f8215f4 via-rng: enable secondary noise source on CPUs where it is present
:::::: TO: Dave Jones <davej@...hat.com>
:::::: CC: Linus Torvalds <torvalds@...dy.linux-foundation.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Powered by blists - more mailing lists