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Message-ID: <3000562.rVDEqMHngn@jernej-laptop>
Date:   Tue, 02 Jan 2018 09:31:05 +0100
From:   Jernej Škrabec <jernej.skrabec@...l.net>
To:     linux-sunxi@...glegroups.com, icenowy@...c.io
Cc:     Chen-Yu Tsai <wens@...e.org>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        linux-clk <linux-clk@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [linux-sunxi] [PATCH v4 1/6] ARM: sunxi: h3/h5: add simplefb nodes

Hi,

Dne torek, 02. januar 2018 ob 09:14:37 CET je Icenowy Zheng napisal(a):
> 在 2018年1月2日星期二 CST 下午4:11:04,Chen-Yu Tsai 写道:
> 
> > On Sat, Dec 30, 2017 at 7:30 PM, Icenowy Zheng <icenowy@...c.io> wrote:
> > > The H3/H5 SoCs have a HDMI output and a TV Composite output.
> > > 
> > > Add simplefb nodes for these outputs.
> > > 
> > > Signed-off-by: Icenowy Zheng <icenowy@...c.io>
> > > ---
> > > Changes in v4:
> > > - Dropped extra clocks (bus clocks and HDMI DDC clocks), only keep the
> > > 
> > >   clocks that are needed to display framebuffer to the monitor.
> > 
> > Looks good. I assume you've tested this? It does continue to work
> > with the bus and DDC clocks disabled, right?
> 
> Yes. This patchset is tested in Orange Pi PC and SoPine w/ Baseboard "Model
> A".

I think DDC clock is misnamed and according to DW HDMI binding should be named 
ISFR (clock for special function registers). I did few test tests when writing 
U-Boot driver and it has to be enabled all the time for driver to work 
correctly. I did few additional tests few days back - if only DDC clock is 
enabled and PLL video/HDMI clock disabled, DW HDMI registers are accessible.

I guess DDC clock in your case is not needed because controller is already 
configured correctly.

Best regards,
Jernej


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