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Message-ID: <da228a50-26ac-6055-61e0-38524da106bc@ti.com>
Date: Wed, 3 Jan 2018 15:00:33 +0530
From: Sekhar Nori <nsekhar@...com>
To: Atul Garg <agarg@...san.com>, <linux-mmc@...r.kernel.org>,
<kishon@...com>, <rk@...com>, <nm@...com>,
<ulf.hansson@...aro.org>, <adrian.hunter@...el.com>
CC: <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V6] mmc:host:sdhci-pci:Addition of Arasan PCI Controller
with integrated phy.
On Wednesday 03 January 2018 05:41 AM, Atul Garg wrote:
> The Arasan Controller is based on a FPGA platform and has integrated phy
> with specific registers used during initialization and
> management of different modes. The phy and the controller are integrated
> and registers are very specific to Arasan.
>
> Arasan being an IP provider, licenses these IPs to various companies for
> integration of IP in custom SOCs. The custom SOCs define own register
> map depending on how bits are tied inside the SOC for phy registers,
> depending on SOC memory plan and hence will require own platform drivers.
>
> If more details on phy registers are required, an interface document is
> hosted at https: //arasandotcom/NF/eMMC5.1 PHY Programming in Linux.pdf.
Please fix this link (no space after : and arasan.com instead of
arasandotcom etc).
>
> Signed-off-by: Atul Garg <agarg@...san.com>
Apart from the comments given by Adrian, looks good to me.
Reviewed-by: Sekhar Nori <nsekhar@...com>
Regards,
Sekhar
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