linux-kernel - Re: [PATCH v7 4/5] clk: aspeed: Register gated clocks

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Message-ID: <20180103014703.GS7997@codeaurora.org>
Date:   Tue, 2 Jan 2018 17:47:03 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Joel Stanley <joel@....id.au>
Cc:     Lee Jones <lee.jones@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Andrew Jeffery <andrew@...id.au>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Jeremy Kerr <jk@...abs.org>,
        Rick Altherr <raltherr@...gle.com>,
        Ryan Chen <ryan_chen@...eedtech.com>,
        Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH v7 4/5] clk: aspeed: Register gated clocks

On 12/22, Joel Stanley wrote:
> The majority of the clocks in the system are gates paired with a reset
> controller that holds the IP in reset.
> 
> This borrows from clk_hw_register_gate, but registers two 'gates', one
> to control the clock enable register and the other to control the reset
> IP. This allows us to enforce the ordering:
> 
>  1. Place IP in reset
>  2. Enable clock
>  3. Delay
>  4. Release reset
> 
> There are some gates that do not have an associated reset; these are
> handled by using -1 as the index for the reset.
> 
> Reviewed-by: Andrew Jeffery <andrew@...id.au>
> Signed-off-by: Joel Stanley <joel@....id.au>
> ---

Applied to clk-next

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