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Message-ID: <20180103194151.GA21040@codeaurora.org>
Date:   Wed, 3 Jan 2018 11:41:51 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc:     Andy Gross <andy.gross@...aro.org>,
        Mark Brown <broonie@...nel.org>, linux-arm-msm@...r.kernel.org,
        alsa-devel@...a-project.org, David Brown <david.brown@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Patrick Lai <plai@...eaurora.org>,
        Banajit Goswami <bgoswami@...eaurora.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>, linux-soc@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [RESEND PATCH v2 14/15] ASoC: qcom: apq8096: Add db820c machine
 driver

On 01/03, Srinivas Kandagatla wrote:
> Thanks for your review comments,
> 
> On 03/01/18 17:20, Stephen Boyd wrote:
> >>+
> >>+	return ret;
> >>+}
> >>+
> >>+static int msm_snd_apq8096_probe(struct platform_device *pdev)
> >>+{
> >>+	int ret;
> >>+	struct snd_soc_card *card;
> >>+
> >>+	card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
> >>+	if (!card)
> >>+		return -ENOMEM;
> >>+
> >>+	card->dev = &pdev->dev;
> >>+
> >>+	ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
> >
> >Why do we need to do this? Can you add some sort of comment in the code
> >about why?
> 
> Even though dsp supports 64 bit addresses, but the sid sits at
> offset of 32, which brings this restriction of supporting only 32
> bit iova.
> 

Doesn't the dsp have an iommu in place to make the address
translation from 64 to 32 bits transparent? I thought this was
what dma-ranges and iommu binding was for, but I'm not well
versed on all the details here.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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