lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed,  3 Jan 2018 12:39:52 -0800
From:   Nick Desaulniers <ndesaulniers@...gle.com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     tj@...nel.org, cl@...ux.com, mingo@...hat.com, hpa@...or.com,
        bp@...e.de, luto@...nel.org, kirill.shutemov@...ux.intel.com,
        thgarnie@...gle.com, jpoimboe@...hat.com, minipli@...glemail.com,
        me@...ehuey.com, namit@...are.com, tklauser@...tanz.ch,
        thomas.lendacky@....com, linux-kernel@...r.kernel.org,
        x86@...nel.org, Nick Desaulniers <ndesaulniers@...gle.com>,
        Borislav Petkov <bpetkov@...e.de>
Subject: [PATCH] x86/process: define cpu_tss_rw in same section as declaration

cpu_tss_rw was declared with the macro

DECLARE_PER_CPU_PAGE_ALIGNED

but then defined with the macro

DEFINE_PER_CPU_SHARED_ALIGNED

leading to section mismatch warnings. Prefer the macro

DEFINE_PER_CPU_PAGE_ALIGNED

Suggested-by: Thomas Gleixner <tglx@...utronix.de>
Signed-off-by: Nick Desaulniers <ndesaulniers@...gle.com>
---
 arch/x86/kernel/process.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index aed9d94bd46f..832a6acd730f 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -47,7 +47,7 @@
  * section. Since TSS's are completely CPU-local, we want them
  * on exact cacheline boundaries, to eliminate cacheline ping-pong.
  */
-__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss_rw) = {
+__visible DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss_rw) = {
 	.x86_tss = {
 		/*
 		 * .sp0 is only used when entering ring 0 from a lower
-- 
2.16.0.rc0.223.g4a4ac83678-goog

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ