linux-kernel - [PATCH 4.14 08/14] x86/process: Define cpu_tss

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Date:   Thu,  4 Jan 2018 13:09:25 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
        Nick Desaulniers <ndesaulniers@...gle.com>,
        thomas.lendacky@....com, Borislav Petkov <bpetkov@...e.de>,
        tklauser@...tanz.ch, minipli@...glemail.com, me@...ehuey.com,
        namit@...are.com, luto@...nel.org, jpoimboe@...hat.com,
        tj@...nel.org, cl@...ux.com, bp@...e.de, thgarnie@...gle.com,
        kirill.shutemov@...ux.intel.com
Subject: [PATCH 4.14 08/14] x86/process: Define cpu_tss_rw in same section as declaration

4.14-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Nick Desaulniers <ndesaulniers@...gle.com>

commit 2fd9c41aea47f4ad071accf94b94f94f2c4d31eb upstream.

cpu_tss_rw is declared with DECLARE_PER_CPU_PAGE_ALIGNED
but then defined with DEFINE_PER_CPU_SHARED_ALIGNED
leading to section mismatch warnings.

Use DEFINE_PER_CPU_PAGE_ALIGNED consistently. This is necessary because
it's mapped to the cpu entry area and must be page aligned.

[ tglx: Massaged changelog a bit ]

Fixes: 1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct")
Suggested-by: Thomas Gleixner <tglx@...utronix.de>
Signed-off-by: Nick Desaulniers <ndesaulniers@...gle.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: thomas.lendacky@....com
Cc: Borislav Petkov <bpetkov@...e.de>
Cc: tklauser@...tanz.ch
Cc: minipli@...glemail.com
Cc: me@...ehuey.com
Cc: namit@...are.com
Cc: luto@...nel.org
Cc: jpoimboe@...hat.com
Cc: tj@...nel.org
Cc: cl@...ux.com
Cc: bp@...e.de
Cc: thgarnie@...gle.com
Cc: kirill.shutemov@...ux.intel.com
Link: https://lkml.kernel.org/r/20180103203954.183360-1-ndesaulniers@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 arch/x86/kernel/process.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -47,7 +47,7 @@
  * section. Since TSS's are completely CPU-local, we want them
  * on exact cacheline boundaries, to eliminate cacheline ping-pong.
  */
-__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss_rw) = {
+__visible DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss_rw) = {
 	.x86_tss = {
 		/*
 		 * .sp0 is only used when entering ring 0 from a lower