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Message-ID: <20180104182858.2nevvgeq5wdojz2w@pd.tnic>
Date: Thu, 4 Jan 2018 19:28:58 +0100
From: Borislav Petkov <bp@...en8.de>
To: Tim Chen <tim.c.chen@...ux.intel.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Andy Lutomirski <luto@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg KH <gregkh@...uxfoundation.org>,
Dave Hansen <dave.hansen@...el.com>,
Andrea Arcangeli <aarcange@...hat.com>,
Andi Kleen <ak@...ux.intel.com>,
Arjan Van De Ven <arjan.van.de.ven@...el.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 7/7] x86/microcode: Recheck IBRS features on microcode
reload
On Thu, Jan 04, 2018 at 09:56:48AM -0800, Tim Chen wrote:
> On new microcode write, check whether IBRS
> is present by rescanning scattered CPU features.
>
> Signed-off-by: Tim Chen <tim.c.chen@...ux.intel.com>
> ---
> arch/x86/kernel/cpu/microcode/core.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
> index c4fa4a8..44b9355 100644
> --- a/arch/x86/kernel/cpu/microcode/core.c
> +++ b/arch/x86/kernel/cpu/microcode/core.c
> @@ -40,6 +40,7 @@
> #include <asm/processor.h>
> #include <asm/cmdline.h>
> #include <asm/setup.h>
> +#include <asm/spec_ctrl.h>
>
> #define DRIVER_VERSION "2.2"
>
> @@ -444,6 +445,11 @@ static ssize_t microcode_write(struct file *file, const char __user *buf,
> if (ret > 0)
> perf_check_microcode();
>
> + /* check spec_ctrl capabilities */
> + mutex_lock(&spec_ctrl_mutex);
> + init_scattered_cpuid_features(&boot_cpu_data);
No need for that - make a specific function like perf_check_microcode()
which checks only the IBRS bit and updates stuff accordingly.
--
Regards/Gruss,
Boris.
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