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Message-ID: <20180106151040.731937ef@archlinux>
Date: Sat, 6 Jan 2018 15:10:40 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Sumit Pundir <pundirsumit11@...il.com>
Cc: lars@...afoo.de, Michael.Hennerich@...log.com, knaack.h@....de,
pmeerw@...erw.net, gregkh@...uxfoundation.org,
linux-iio@...r.kernel.org, devel@...verdev.osuosl.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] Staging: iio: cdc: Prefer using BIT macro
On Sat, 6 Jan 2018 20:35:24 +0530
Sumit Pundir <pundirsumit11@...il.com> wrote:
> This patch fixes the following checkpatch.pl issue at multiple lines:
>
> CHECK: Prefer using the BIT macro
>
> Signed-off-by: Sumit Pundir <pundirsumit11@...il.com>
> ---
> v2:
> Added the specific driver being changed to the patch title
Not that I can see.
Anyhow, never mind I'll fix it whilst applying.
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.
Thanks,
Jonathan
> and the appropriate fixes as suggested.
>
> drivers/staging/iio/cdc/ad7152.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c
> index 59d1b35..19dc896 100644
> --- a/drivers/staging/iio/cdc/ad7152.c
> +++ b/drivers/staging/iio/cdc/ad7152.c
> @@ -47,7 +47,7 @@
> #define AD7152_STATUS_PWDN BIT(7)
>
> /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
> -#define AD7152_SETUP_CAPDIFF (1 << 5)
> +#define AD7152_SETUP_CAPDIFF BIT(5)
> #define AD7152_SETUP_RANGE_2pF (0 << 6)
> #define AD7152_SETUP_RANGE_0_5pF (1 << 6)
> #define AD7152_SETUP_RANGE_1pF (2 << 6)
> @@ -55,8 +55,8 @@
> #define AD7152_SETUP_RANGE(x) ((x) << 6)
>
> /* Config Register Bit Designations (AD7152_REG_CFG) */
> -#define AD7152_CONF_CH2EN (1 << 3)
> -#define AD7152_CONF_CH1EN (1 << 4)
> +#define AD7152_CONF_CH2EN BIT(3)
> +#define AD7152_CONF_CH1EN BIT(4)
> #define AD7152_CONF_MODE_IDLE (0 << 0)
> #define AD7152_CONF_MODE_CONT_CONV (1 << 0)
> #define AD7152_CONF_MODE_SINGLE_CONV (2 << 0)
> @@ -64,7 +64,7 @@
> #define AD7152_CONF_MODE_GAIN_CAL (6 << 0)
>
> /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
> -#define AD7152_CAPDAC_DACEN (1 << 7)
> +#define AD7152_CAPDAC_DACEN BIT(7)
> #define AD7152_CAPDAC_DACP(x) ((x) & 0x1F)
>
> /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
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