[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <98026f36-a283-f054-a8df-7be1ba59803e@amd.com>
Date: Sat, 6 Jan 2018 19:44:38 -0600
From: Tom Lendacky <thomas.lendacky@....com>
To: "Woodhouse, David" <dwmw@...zon.co.uk>,
Andrew Cooper <andrew.cooper3@...rix.com>,
Andi Kleen <ak@...ux.intel.com>
Cc: Paul Turner <pjt@...gle.com>, LKML <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg Kroah-Hartman <gregkh@...ux-foundation.org>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Dave Hansen <dave.hansen@...el.com>, tglx@...utronix.de,
Kees Cook <keescook@...gle.com>,
Rik van Riel <riel@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
Andy Lutomirski <luto@...capital.net>,
Jiri Kosina <jikos@...nel.org>, gnomes@...rguk.ukuu.org.uk
Subject: Re: [PATCH v5 02/12] x86/retpoline: Add initial retpoline support
On 1/6/2018 3:21 PM, Woodhouse, David wrote:
> On Sat, 2018-01-06 at 21:16 +0000, Andrew Cooper wrote:
>> On 06/01/18 11:49, David Woodhouse wrote:
>>> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
>>> index 372ba3f..40e6e54 100644
>>> --- a/arch/x86/kernel/cpu/common.c
>>> +++ b/arch/x86/kernel/cpu/common.c
>>> @@ -904,6 +904,11 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
>>>
>>> setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
>>> setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
>>> +#ifdef CONFIG_RETPOLINE
>>> + setup_force_cpu_cap(X86_FEATURE_RETPOLINE);
>>> + if (c->x86_vendor == X86_VENDOR_AMD)
>>> + setup_force_cpu_cap(X86_FEATURE_RETPOLINE_AMD);
>>
>> This isn't safe. It needs to be dependant on finding that LFENCEs are
>> actually dispatch serialising.
>>
>> In particular, when virtualised, you'll most likely be saddled with the
>> hypervisors choice of setting, in which case you need to use retpoline
>> as a fallback.
>
> Thanks. I was about to rebase on top of tip/x86/pti which has Tom's
> patches to make lfence serialising — which seem to say that if the MSR
> isn't available, it *will* be serialising.
>
> I think I'll just refrain from setting X86_FEATURE_RETPOLINE_AMD for
> now, and let Tom turn that on in his own time.
I can do that. I'll move it to arch/x86/kernel/cpu/amd.c to just after
the line that sets the MSR bit making lfence serializing. I'll submit
that once your patches are pulled in (or at least the feature bits).
Thanks,
Tom
>
Powered by blists - more mailing lists