[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20180108223158.21930-3-chris.packham@alliedtelesis.co.nz>
Date: Tue, 9 Jan 2018 11:31:57 +1300
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: jlu@...gutronix.de, linux@...linux.org.uk, bp@...en8.de,
linux-arm-kernel@...ts.infradead.org, linux-edac@...r.kernel.org
Cc: linux-kernel@...r.kernel.org,
Chris Packham <chris.packham@...iedtelesis.co.nz>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...e-electrons.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org
Subject: [PATCH 2/3] ARM: dts: mvebu: add sdram controller node to Armada-38x
The Armada-38x uses an SDRAM controller that is compatible with the
Armada-XP. The key difference is the width of the bus (XP is 64/32, 38x
is 32/16). The SDRAM controller registers are the same between the two
SoCs.
Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
---
arch/arm/boot/dts/armada-38x.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 00ff549d4e39..6d34c5ec178f 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -138,6 +138,11 @@
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+ sdramc@...0 {
+ compatible = "marvell,armada-xp-sdram-controller";
+ reg = <0x1400 0x500>;
+ };
+
L2: cache-controller@...0 {
compatible = "arm,pl310-cache";
reg = <0x8000 0x1000>;
--
2.15.1
Powered by blists - more mailing lists