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Message-ID: <20180108104111.GE32635@b29396-OptiPlex-7040>
Date: Mon, 8 Jan 2018 18:41:11 +0800
From: Dong Aisheng <dongas86@...il.com>
To: Anson Huang <Anson.Huang@....com>
Cc: linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, sboyd@...eaurora.org,
mturquette@...libre.com, fabio.estevam@....com,
kernel@...gutronix.de, shawnguo@...nel.org, linux-imx@....com
Subject: Re: [PATCH] clk: imx: imx7d: correct video pll clock tree
On Thu, Jan 04, 2018 at 01:09:21AM +0800, Anson Huang wrote:
> There is a test divider and post divider in video PLL,
> test divider is placed before post divider, all clocks
> that can select parent from video PLL should be from
> post divider, NOT from pll_video_main, below are
> clock tree dump before and after this patch:
>
> Before:
> pll_video_main
> pll_video_main_bypass
> pll_video_main_clk
> lcdif_pixel_src
> lcdif_pixel_cg
> lcdif_pixel_pre_div
> lcdif_pixel_post_div
> lcdif_pixel_root_clk
> After:
> pll_video_main
> pll_video_main_bypass
> pll_video_main_clk
> pll_video_test_div
> pll_video_post_div
> lcdif_pixel_src
> lcdif_pixel_cg
> lcdif_pixel_pre_div
> lcdif_pixel_post_div
> lcdif_pixel_root_clk
>
> Signed-off-by: Anson Huang <Anson.Huang@....com>
Acked-by: Dong Aisheng <aisheng.dong@....com>
Regards
Dong Aisheng
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