linux-kernel - [PATCH v1 2/2] x86/cpu/AMD: Clear RETPOLINE

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20180109223745.29322.30862.stgit@tlendack-t1.amdoffice.net>
Date:   Tue, 09 Jan 2018 16:37:45 -0600
From:   Tom Lendacky <thomas.lendacky@....com>
To:     x86@...nel.org, linux-kernel@...r.kernel.org
Cc:     Rik van Riel <riel@...hat.com>, Andi Kleen <ak@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Jiri Kosina <jikos@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Borislav Petkov <bp@...en8.de>,
        Andy Lutomirski <luto@...nel.org>,
        Kees Cook <keescook@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Greg Kroah-Hartman <gregkh@...ux-foundation.org>,
        David Woodhouse <dwmw@...zon.co.uk>,
        Paul Turner <pjt@...gle.com>
Subject: [PATCH v1 2/2] x86/cpu/AMD: Clear RETPOLINE_AMD if LFENCE is not
 serializing

During early boot, spectre_v2_check_boottime_disable() sets the
RETPOLINE_AMD feature for AMD hardware (before init_amd() is called).
Since the RETPOLINE_AMD feature uses LFENCE to perform speculation
control, it can only be used if LFENCE is serializing.  Clear the
RETPOLINE_AMD feature if the MSR write to make LFENCE serializing
is not successful.

Signed-off-by: Tom Lendacky <thomas.lendacky@....com>
---
 arch/x86/kernel/cpu/amd.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index ea831c8..8a0076b 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -13,6 +13,7 @@
 #include <asm/smp.h>
 #include <asm/pci-direct.h>
 #include <asm/delay.h>
+#include <asm/nospec-branch.h>
 
 #ifdef CONFIG_X86_64
 # include <asm/mmconfig.h>
@@ -854,6 +855,9 @@ static void init_amd(struct cpuinfo_x86 *c)
 		} else {
 			/* MFENCE stops RDTSC speculation */
 			set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
+
+			/* Don't use the LFENCE-based retpoline support */
+			retpoline_amd_disable();
 		}
 	}