[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <bdc0375d-c379-6c2e-b350-76741afe151d@linux.intel.com>
Date: Wed, 10 Jan 2018 15:45:58 -0800
From: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
To: Arnd Bergmann <arnd@...db.de>
Cc: Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...id.au>,
gregkh <gregkh@...uxfoundation.org>,
Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-doc@...r.kernel.org, DTML <devicetree@...r.kernel.org>,
linux-hwmon@...r.kernel.org,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>
Subject: Re: [PATCH linux dev-4.10 6/6] drivers/hwmon: Add a driver for a
generic PECI hwmon
On 1/10/2018 4:29 AM, Arnd Bergmann wrote:
> On Tue, Jan 9, 2018 at 11:31 PM, Jae Hyun Yoo
> <jae.hyun.yoo@...ux.intel.com> wrote:
>> This commit adds driver implementation for a generic PECI hwmon.
>>
>> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
>
>> +static int xfer_peci_msg(int cmd, void *pmsg)
>> +{
>> + int rc;
>> +
>> + mutex_lock(&peci_hwmon_lock);
>> + rc = peci_ioctl(NULL, cmd, (unsigned long)pmsg);
>> + mutex_unlock(&peci_hwmon_lock);
>> +
>> + return rc;
>> +}
>
> I said earlier that peci_ioctl() looked unused, that was obviously
> wrong, but what you have here
> is not a proper way to abstract a bus.
>
> Maybe this can be done more like an i2c bus: make the peci controller
> a bus device
> and register all known target/index pairs as devices with the peci bus
> type, and have
> them probed from DT. The driver can then bind to each of those individually.
> Not sure if that is getting to granular at that point, I'd have to
> understand better
> how it is expected to get used, and what the variances are between
> implementations.
>
> Arnd
>
Thanks for sharing your opinion. In fact, this was also suggested by
openbmc community so I should consider of redesigning it. I'm currently
thinking about adding a new PECI device class as an abstract layer and
any BMC chipset specific driver could be attached to the PECI class
driver. Then, each CPU client could be registered as an individual
device as you suggested. Will consider your suggestion.
Thanks a lot!
Jae
Powered by blists - more mailing lists