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Message-ID: <1515576479.22302.81.camel@infradead.org>
Date: Wed, 10 Jan 2018 09:27:59 +0000
From: David Woodhouse <dwmw2@...radead.org>
To: Peter Zijlstra <peterz@...radead.org>,
Dave Hansen <dave.hansen@...el.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...uxfoundation.org>, x86@...nel.org,
Borislav Petkov <bp@...en8.de>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Andrea Arcangeli <aarcange@...hat.com>,
Andi Kleen <ak@...ux.intel.com>,
Greg KH <gregkh@...uxfoundation.org>,
Andy Lutomirski <luto@...nel.org>,
Arjan Van De Ven <arjan.van.de.ven@...el.com>
Subject: Re: [patch RFC 5/5] x86/speculation: Add basic speculation control
code
On Wed, 2018-01-10 at 10:22 +0100, Peter Zijlstra wrote:
> On Tue, Jan 09, 2018 at 06:02:53PM -0800, Dave Hansen wrote:
> >
> > On 01/09/2018 05:06 PM, Thomas Gleixner wrote:
> > >
> > > --- a/arch/x86/kernel/cpu/bugs.c
> > > +++ b/arch/x86/kernel/cpu/bugs.c
> > > @@ -79,6 +79,7 @@ enum spectre_v2_mitigation_cmd {
> > > SPECTRE_V2_CMD_RETPOLINE,
> > > SPECTRE_V2_CMD_RETPOLINE_GENERIC,
> > > SPECTRE_V2_CMD_RETPOLINE_AMD,
> > > + SPECTRE_V2_CMD_IBRS,
> > > };
> > A few nits on this:
> >
> > IBRS should not default on anywhere, which goes double when retpolines
> > are available.
> >
> > I think I'd also prefer that we separate the IBRS and retpoline enabling
> > so that you can do both if you want. They do nearly the same thing in
> > practice, but I can't convince myself that you never ever need IBRS once
> > retpolines are in place.
> As per:
>
> https://lkml.kernel.org/r/1515460999.4423.104.camel@amazon.co.uk
>
> IBRS=2 (always on) is preferred for SKL+ over retpoline.
>
> And from what I gather IBRS=1 is never better than retpoline, IBRS=1 is
> both slower and covers less AFAIU (please educate if I'm wrong).
>
> From this point, I would prefer to not even have the IBRS=1 code.
>
> The only question I have is if retpoline works at all on SKL (with ucode
> update); BDW needs the ucode update for retpoline to work because of the
> RSB fallback.
As I understand it, Skylake is never getting the IBRS_ATT (all the
time) feature. That is for future CPUs only.
I don't know why you're calling that 'IBRS=2'; are you getting confused
by Andrea's distro horridness?
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