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Message-Id: <2F24076F-4679-4F0A-B314-FC695E9D2211@amacapital.net>
Date:   Tue, 9 Jan 2018 17:23:02 -0800
From:   Andy Lutomirski <luto@...capital.net>
To:     Andi Kleen <andi@...stfloor.org>
Cc:     tglx@...utronix.de, x86@...nel.org, linux-kernel@...r.kernel.org,
        torvalds@...ux-foundation.org, dwmw@...zon.co.uk, pjt@...gle.com,
        luto@...nel.org, peterz@...radead.org, thomas.lendacky@....com,
        tim.c.chen@...ux.intel.com, gregkh@...ux-foundation.org,
        dave.hansen@...el.com, jikos@...nel.org,
        Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH v1 5/8] x86/entry/clearregs: Clear registers for 64bit exceptions/interrupts



> On Jan 9, 2018, at 5:03 PM, Andi Kleen <andi@...stfloor.org> wrote:
> 
> From: Andi Kleen <ak@...ux.intel.com>
> 
> Clear all registers on entering the 64bit kernel for exceptions and
> interrupts.
> 
> Since there are no arguments this is fairly simple.
> 
> Signed-off-by: Andi Kleen <ak@...ux.intel.com>
> ---
> arch/x86/entry/entry_64.S | 5 +++++
> 1 file changed, 5 insertions(+)
> 
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index 632081fd7086..6ab4c2aaeabb 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -636,6 +636,7 @@ END(irq_entries_start)
>    ALLOC_PT_GPREGS_ON_STACK
>    SAVE_C_REGS
>    SAVE_EXTRA_REGS
> +    CLEAR_ALL_REGS
>    ENCODE_FRAME_POINTER
> 
>    testb    $3, CS(%rsp)
> @@ -1192,6 +1193,7 @@ ENTRY(xen_failsafe_callback)
>    ALLOC_PT_GPREGS_ON_STACK
>    SAVE_C_REGS
>    SAVE_EXTRA_REGS
> +    CLEAR_ALL_REGS
>    ENCODE_FRAME_POINTER

If CLEAR_ALL_REGS does what it sounds like, then its overkill here.

I could get behind this patch in general, though.  Interrupts are so slow the the overhead probably doesn't matter.

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