linux-kernel - Re: [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED

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Message-Id: <35C3E23E-3BDE-4AFD-BD16-758A2D0B9037@gmail.com>
Date:   Wed, 10 Jan 2018 09:23:16 -0800
From:   Nadav Amit <nadav.amit@...il.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Jim Mattson <jmattson@...gle.com>,
        Liran Alon <liran.alon@...cle.com>, dwmw@...zon.co.uk,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
        the arch/x86 maintainers <x86@...nel.org>, bp@...en8.de,
        Tom Lendacky <thomas.lendacky@....com>, aliguori@...zon.com,
        Arjan van de Ven <arjan@...ux.intel.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        LKML <linux-kernel@...r.kernel.org>,
        kvm list <kvm@...r.kernel.org>
Subject: Re: [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and
 MSR_IA32_PRED_CMD down to the guest

Paolo Bonzini <pbonzini@...hat.com> wrote:

> On 10/01/2018 18:14, Jim Mattson wrote:
>>>> If (a) is true, does "IBRS ALL THE TIME" usage is basically a CPU
>>>> change to just create all BTB/BHB entries to be tagged with
>>>> prediction-mode at creation-time and that tag to be compared to current
>>>> prediction-mode when CPU attempts to use BTB/BHB?
>>> 
>>> I hope so, and I hope said prediction mode includes PCID/VPID too.
>> 
>> Branch prediction entries should probably be tagged with PCID, VPID,
>> EP4TA, and thread ID...the same things used to tag TLB contexts.
> 
> But if so, I don't see the need for IBPB.

It is highly improbable that a microcode patch can change how prediction
entries are tagged. IIRC, microcode may change the behavior of instructions
and “assists" (e.g., TLB miss). Not much more than that.